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381 commits

Author SHA1 Message Date
Nekotekina
adc7d96683 SPU LLVM: simplify function prototype 
Pass only $3
 2019-05-15 16:18:13 +03:00
Nekotekina
16401722f1 SPU LLVM: fix $SP passing in functions, write PC on halt 
Allows to skip updating $SP in optimizable functions.
 2019-05-15 15:42:03 +03:00
Nekotekina
3753d27aba SPU: fix Giga mode (kinda) 
Don't scan before the entry point.
Disable stack mirror in SPU LLVM.
Improve analyser logic for holes.
 2019-05-14 22:15:04 +03:00
Nekotekina
c481472faf SPU ASMJIT: add PIC support (fix) 
Also cleanup and adapt for GHC CC.
 2019-05-14 22:15:04 +03:00
Nekotekina
82295d131a SPU LLVM: split LLVM IR dump to spu-ir.log 
Also move disasm to spu_recompiler_base::dump.
Interleave disasm with block target info for convenience.
 2019-05-14 22:15:04 +03:00
Nekotekina
1eed421774 SPU LLVM: use branch patchpoints again 
Renewed and adapted for PIC and all branch types.
This may address performance degradation after #5923.
 2019-05-14 22:15:04 +03:00
Nekotekina
2f6707d0a0 SPU LLVM: regain some efficiency 
Avoid returns from the recompiler gateway, favoring tail calls.
This may address performance degradation after #5923.
 2019-05-14 22:15:04 +03:00
Nekotekina
f33b81545e SPU: implement recompiler gateway function in assembly 
Use GHC calling convention directly for SPU object entry points.
This may address performance degradation after #5923.
 2019-05-14 22:15:04 +03:00
Nekotekina
a74fd27e3d SPU LLVM: fix SPU termination (spu_escape) on Windows 
Adjust restored stack pointer for the lack of tail call.
 2019-05-14 22:15:04 +03:00
Nekotekina
cc8c635855 SPU: PIC support preview 
SPU ASMJIT not supported yet.
Giga mode not supported properly.
 2019-05-14 22:15:04 +03:00
Rui Pinheiro
1f82a26a9c SPU LLVM: Fix Mega 2019-05-12 00:39:42 +03:00
Nekotekina
8194c92f1c SPU LLVM: disable GHC CC for chunks on Windows 
Causes fatal error inside LLVM.
 2019-05-11 02:35:16 +03:00
Nekotekina
7492f335e9 SPU analyser: basic function detection in Giga mode 
Misc: fix EH frame registration (LLVM, non-Windows).
Misc: constant-folding bitcast (cpu_translator).
Misc: add syntax for LLVM arrays (cpu_translator).
Misc: use function names for proper linkage (SPU LLVM).

Changed function search and verification in Giga mode.
Basic stack frame layout analysis.
Function detection in Giga mode.
Basic use of new information in SPU LLVM.
Fixed jump table compilation in SPU LLVM.
Disable broken optimization in Accurate xfloat mode.
Make compiled SPU modules position-independent in SPU LLVM.

Optimizations include but not limited to:
 * Compiling SPU functions as native functions when eligible
 * Avoiding register context write-out
 * Aligned stack assumption (CWD alike instruction)
 2019-05-11 02:13:19 +03:00
Nekotekina
a703460fc6 SPU ASMJIT: skip some unused analyser steps 
May improve performance
 2019-05-04 19:35:13 +03:00
Nekotekina
45ce8db6cb SPU Analyser: fix reg origin regression 
Propagate phi instead of claiming new values
 2019-05-04 18:29:47 +03:00
Nekotekina
4bd022f778 SPU analyser: minor logic fix and cleanup 
Don't fill any chunk info for now (design mistake).
 2019-05-03 14:18:22 +03:00
Nekotekina
6c34d7104e SPU analyser: fix excessive workload list size 
Typo grade; regression
 2019-05-02 23:29:02 +03:00
Nekotekina
2b4da18709 SPU LLVM: fix xfloat regression 
It was an old bug with possible hidden use of deleted instructions.
 2019-05-02 13:39:43 +03:00
Nekotekina
d48dc29e55 SPU LLVM: fix perf regression 
Bug in the analyser was created recently in #5882.
 2019-05-02 13:39:43 +03:00
Nekotekina
69d2ea35b9 SPU: minor analyser cleanup 2019-05-02 13:39:43 +03:00
Nekotekina
a4c4ee9cb2 SPU: fix excessive cache size regression 2019-05-02 13:39:43 +03:00
Nekotekina
1bc5e27507 SPU LLVM: move reg origin search to analyser 
Refactor SPU analyser (block_info struct).
Fill register use info (currently unused).
 2019-05-01 00:37:15 +03:00
Nekotekina
1294e0d189 SPU LLVM: improve codegen in loops 
Use a trick in check_state to improve LICM pass.
 2019-05-01 00:37:15 +03:00
Nekotekina
e09c6ea4b4 SPU analyser: add spu_iflag 
Register information about register accesses.
 2019-04-30 14:33:27 +03:00
Nekotekina
716737ecf2 LLVM DSL: expression matching (alpha) 
Implement remaining instructions.
Implement match_expr method.
Implement helper methods.
 2019-04-30 14:33:27 +03:00
Nekotekina
8754bbd444 SPU LLVM: add match_vr<> template 
Returns reg value only if type is compatible, avoiding bitcast.
 2019-04-24 23:55:41 +03:00
Nekotekina
dd9bd1338b SPU LLVM: add get_vrs<> template 2019-04-24 23:55:41 +03:00
Nekotekina
3e0b45719d LLVM DSL: rewrite zshuffle, shuffle2, build 
Add llvm_const_vector template.
 2019-04-24 23:55:41 +03:00
Nekotekina
b02503963e LLVM DSL: rewrite splat, fsplat, vsplat 
Add llvm_const_float and llvm_splat templates.
 2019-04-24 23:55:41 +03:00
Nekotekina
c83e65f29e LLVM DSL: rewrite extract and insert 2019-04-24 23:55:41 +03:00
Nekotekina
b7b93eae13 SPU LLVM: minor bitcast cleanup 
Remove redundant explicit constand propagation in some instructions.
 2019-04-24 23:55:41 +03:00
Nekotekina
ac473eb400 Rewrite cpu_translator::rol, add fshl and fshr 
Use new funnel shift intrinsics
 2019-04-24 23:55:41 +03:00
Nekotekina
42448cf3e5 Remove cpu_translator::scarry, cpu_translator::merge 2019-04-24 23:55:41 +03:00
Nekotekina
524aac75ed LLVM DSL: rewrite bitcast, zext, sext, trunc, select, min, max ops 
Are made composable in expressions similar to arithmetic ops.
Implement noncast in addition to bitcast (no-op case).
Implement bitcast constant folding.
Fixed some misuse of sext<>.
 2019-04-24 23:55:41 +03:00
Nekotekina
dc9118ef50 LLVM DSL refactoring 
Properly forward value categories in expression structs.
Simplify SFINAE tests (is_llvm_expr, llvm_common_t) in global operators.
Add llvm_const_int and remove llvm_add_const, llvm_sub_const, etc.
Add llvm_ord and llvm_uno for FP comparison via >=< operators.
Replace cpu_translator::fcmp with fcmp_ord and fcmp_uno.
 2019-04-24 23:55:41 +03:00
Nekotekina
8deb20e928 SPU: write cache before compiling 2019-04-13 22:56:11 +03:00
eladash
8da78c098c SPU LLVM: Fix branch to self at start of block state check 2019-04-11 17:47:52 +03:00
eladash
eba8e2284b SPU LLVM: Fix CFLTU 
Clamp properly result from both sides!

TODO: Figure out whats different CreateFPToUi has from CFLTU and why it fails here.
 2019-04-11 17:47:52 +03:00
eladash
969af86eba SPU: Implement BISLED 
DFCMGT instruction removed, it was wrong to add to begin with

ASMJIT: Fix compilation of double compare instructions, move exception to runtime instead of compiletime!
Jarves confirmed that he implemented this instruction because of that bug with asmjit only, affected God Of War 3
 2019-04-11 17:47:52 +03:00
Nekotekina
d873802b9c Use LLVM 9 
Use new add/sub with saturation intrinsics
 2019-03-30 01:36:48 +03:00
Nekotekina
d77fed6105 SPU LLVM: remove wrong dead code 2019-03-29 17:00:53 +03:00
Nekotekina
71b88cdc82 New SPU interpreter (SPU fast) 
Use LLVM to build SPU interpreter.
Simplify interpreter loop.
 2019-03-27 20:33:44 +03:00
Nekotekina
7ea04d5d76 Minor optimization in SPU analyser 
Reduce vector copy/allocation
 2019-03-23 02:43:41 +03:00
Nekotekina
4b381fbbb1 Implement spu_runtime::reset 
To handle JIT: Out Of Memory error.
 2019-03-23 02:43:41 +03:00
Nekotekina
1880a17f79 SPU recs: implement spu_runtime::find 
Use this function to link to existing functions from branch patchpoints.
Don't compile from branch patchpoints.
 2019-03-23 02:43:41 +03:00
Nekotekina
31304f4234 SPU rec: refactor some trampoline generation 
Move branch/dispatch trampoline generation at startup.
 2019-03-23 02:43:41 +03:00
Nekotekina
3794f65bb6 Add cpu_flag::jit_return 2019-03-23 02:43:41 +03:00
Nekotekina
466d58ccef SPU LLVM: fix branch patchpoints 
Forgot to passthrough 3rd arg (rip)
 2019-03-23 02:43:41 +03:00
Nekotekina
e9b6beadfc SPU LLVM: implement static branch weights 
May help branch prediction in some cases
 2019-03-13 21:14:55 +03:00
Nekotekina
388d49db80 SPU LLVM: fix SPU MMIO in TSX mode 2019-03-13 21:14:55 +03:00