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381 commits

Author SHA1 Message Date
Nekotekina
fb64b28886 SPU LLVM: reintroduce branch patchpoints 
Previously only used on SPU ASMJIT, may improve perf in some cases.
Now refactored to spu_runtime::make_branch_patchpoint.
 2019-03-01 00:08:20 +03:00
Nekotekina
765d15f23f Optimize SPU trampolines 
Load values in EAX and reuse it if possible
 2019-03-01 00:08:19 +03:00
Nekotekina
58358e85dd spu_runtime::add minor optimization 
Use preallocated vectors in trampoline generation subroutine
 2019-01-29 03:32:16 +03:00
Nekotekina
2b66abaf10 Implement atomic_t<>::release 
More relaxed store with release memory order
 2019-01-29 03:32:16 +03:00
Nekotekina
50922faac9 Remove SPUThread::jit_dispatcher 
Use global array - save memory
Move the array to JIT memory
 2019-01-29 03:32:16 +03:00
Nekotekina
4292997a01 Added jit_runtime class 
Is a memory manager for ASMJIT, replaces asmjit::JitRuntime
Unified memory manager for ASMJIT and LLVM
Unified SPU trampoline generation
Remove previous workarounds
 2019-01-29 03:32:16 +03:00
Nekotekina
4f152ad126 SPU: multithread compilation 
Allow parallel compilation of SPU code, both at startup and runtime
Remove 'SPU Shared Runtime' option (it became obsolete)
Refactor spu_runtime class (now is common for ASMJIT and LLVM)
Implement SPU ubertrampoline generation in raw assembly (LLVM)
Minor improvement of balanced_wait_until<> and balanced_awaken<>
Make JIT MemoryManager2 shared (global)
Fix wrong assertion in cond_variable
 2019-01-22 22:02:02 +03:00
elad
fc92ae4085 SPU/PPU atomics performance and LR event fixes (#5435) 
* Fix SPU LR event setting in atomic commands according to hw test
* MFC: increment timestamp for PUT cmd in non-tsx path
* MFC: fix reservation lost test on non-tsx path in regard to the lock bit
* Reservation notification moved out of writer_lock scope to reduce its lifetime
* Use passive_lock/unlock in ppu atomic inctrustions to reduce redundancy
* Lock only once for dma transfers (non-TSX)
* Don't use RDTSC in reservation update logic
* Remove MFC cmd args passing to process_mfc_cmd
* Reorder check_state cpu_flag::memory check for faster unlocking
* Specialization for 128-byte data copy in SPU dma transfers
* Implement memory range locks and isolate PPU and SPU passive lock logic
 2019-01-15 18:31:21 +03:00
eladash
f19fd23227 spu: Fix support for multiple lists when one is stalled 2019-01-15 02:33:22 +03:00
Nekotekina
a419e98acb Move PPU and shader cache 
New hash-based location (already used for SPU)
Bump PPU cache version, improve naming and decrease size

Remove fs::get_data_dir
Disable boot.elf cache
 2019-01-14 01:24:05 +03:00
Nekotekina
aefee04c4a SPU analyser: fix branch to self 
Fixed not filling the predeccessor list on BR-to-self on entry point
Version bumped (v1-tane)
Closes #5353
 2019-01-14 00:01:27 +03:00
Nekotekina
d7be0a96f3 SPU LLVM: approximate xfloat option 
Adapt previous SPU ASMJIT changes made by @kd-11
FM, FMA, FNMS, FMS are approximated.
FCGT, FCMGT are accurate.
 2018-12-24 16:04:46 +03:00
Nekotekina
2fd384ae95 SPU LLVM: check state in every callable chunk 
It's often redundant but may be necessary
 2018-11-09 16:19:59 +03:00
Nekotekina
488928eca2 Fix SPU STOP instruction 
Check thread state after STOP instruction
 2018-11-05 14:35:50 +03:00
Nekotekina
1b37e775be Migration to named_thread<> 
Add atomic_t<>::try_dec instead of fetch_dec_sat
Add atomic_t<>::try_inc
GDBDebugServer is broken (needs rewrite)
Removed old_thread class (former named_thread)
Removed storing/rethrowing exceptions from thread
Emu.Stop doesn't inject an exception anymore
task_stack helper class removed
thread_base simplified (no shared_from_this)
thread_ctrl::spawn simplified (creates detached thread)
Implemented overrideable thread detaching logic
Disabled cellAdec, cellDmux, cellFsAio
SPUThread renamed to spu_thread
RawSPUThread removed, spu_thread used instead
Disabled deriving from ppu_thread
Partial support for thread renaming
lv2_timer... simplified, screw it
idm/fxm: butchered support for on_stop/on_init
vm: improved allocation structure (added size)
 2018-10-19 22:22:35 +03:00
Nekotekina
ca5158a03e Cleanup semaphore<> (sema.h) and mutex.h (shared_mutex) 
Remove semaphore_lock and writer_lock classes, replace with std::lock_guard
Change semaphore<> interface to Lockable (+ exotic try_unlock method)
 2018-09-03 23:00:36 +03:00
Nekotekina
8abe6489ed Mega-cleanup for atomic_t<> and named bit-sets bs_t<> 
Remove "atomic operator" classes
Remove test, test_and_set, test_and_reset, test_and_complement global functions
Simplify atomic_t<> with constexpr if, remove some garbage
Redesign bs_t<> to use class, mark its methods constexpr
Implement atomic_bs_t<> for optimizations
Remove unused __bitwise_ops concept (should be in other header anyway)
Bitsets can now be tested via safe bool conversion
 2018-09-03 21:40:36 +03:00
Nekotekina
9578e1e923 SPU LLVM: lower some log levels 2018-08-14 15:14:06 +03:00
eladash
f349695a75 Rsx: rewrite address translation 2018-08-13 16:16:34 +03:00
Nekotekina
fdd4f03b93 SPU LLVM: improve xfloat precision 
Use doubles for intermediate representation
Add option "Accurate xfloat" to enable
 2018-08-12 15:42:47 +03:00
Nekotekina
14e6577700 SPU LLVM: improve debugging RPCS3 
Build cache in reverse order
Catch exceptions in instruction loop: print IR
 2018-08-12 02:42:32 +03:00
Nekotekina
711e0f75ee SPU LLVM: inline WRCH (preview) 
With lööps for TSX bróþers
 2018-08-12 02:42:32 +03:00
Nekotekina
d01bf3bcb0 SPU LLVM: rewrite CGX 2018-08-12 02:42:32 +03:00
Nekotekina
d3ad44aec4 SPU LLVM: improve constant propagation 
Propagate constants in non-volatile registers between chunks
Disable function table in Mega mode
 2018-08-12 02:42:32 +03:00
Nekotekina
9b4e63df6d SPU LLVM: simplify CG, CGX, BG, BGX 2018-07-21 12:18:07 +03:00
scribam
1b0f5b1ed9 spu: improve dfnma instruction 2018-07-09 03:33:05 +04:00
Nekotekina
d856dc89a8 SPU LLVM: combine SELB with comparison instructions 
Turn bitwise select into a vector select
 2018-07-06 02:26:18 +03:00
Nekotekina
caf827344f SPU LLVM: improve SHL, SHLH, ROTM, ROTHM instructions 
Avoid zero extension, select undef result to zero
 2018-07-06 00:33:52 +03:00
Nekotekina
b9c026d441 SPU LLVM: improve ROTMA and ROTMAH instructions 
Avoid sign extension, clamp shift amount with min op
 2018-07-06 00:33:52 +03:00
Nekotekina
2b9fa7ed23 SPU LLVM: combine SHUFB with CWD-alike instructions 
Turn SHUFB into a vector insert
 2018-07-06 00:33:52 +03:00
Nekotekina
253e8b4466 SPU LLVM: improve SHUFB with constant mask 2018-07-06 00:33:52 +03:00
Nekotekina
622f2f7f66 SPU LLVM: constant computation fixes 
Fixed instructions:
Gather Bits: GB, GBH, GBB
Form Select Mask: FSM, FSMH, FSMB
 2018-07-06 00:33:52 +03:00
Nekotekina
c959ab2698 SPU LLVM: fix constant propagation 
Compute constant bitcasts
 2018-07-06 00:33:52 +03:00
Nekotekina
afd5af04f6 SPU: improve analyser (v5) 
Fix jumptable analysis
 2018-07-06 00:33:52 +03:00
Nekotekina
712632d28a SPU LLVM: inline RDCH 2018-07-06 00:33:52 +03:00
Nekotekina
c1385558ad SPU LLVM: inline RCHCNT 2018-07-06 00:33:52 +03:00
Nekotekina
0910acad42 SPU LLVM: clean NOP/LNOP 
Add volatile to state check and update_pc()
 2018-07-06 00:33:52 +03:00
Nekotekina
513bac0304 SPU LLVM: refactor halt instructions 2018-07-06 00:33:52 +03:00
Nekotekina
a0bf103e8b Implement cpu_translator::pshufb<>() 
Remove spu_translator::pshufb<>()
Improve PSHUFB emulation (pre-SSSE3)
Emit static shufflevector for the constant mask
PPU: Inline VPERM instruction
 2018-07-06 00:33:52 +03:00
Nekotekina
41eab62ed7 Implement spu_iname helper 
Remove old code
Report $SP anomalies
 2018-07-06 00:33:52 +03:00
Nekotekina
8ad05ce10e SPU LLVM: fix jt target duplication bug 2018-07-05 22:26:35 +03:00
Nekotekina
a999bccc03 SPU LLVM: use cpu_translator::build<> 2018-07-05 22:26:35 +03:00
Nekotekina
ded9d1ddfd SPU LLVM: improve function type 
Use pointers for args
Use noalias attribute
 2018-07-05 22:26:35 +03:00
Nekotekina
e4da284176 SPU: analyser v4 and fixes 
Build SPU cache after PPU, fix mixing progress
SPU ASMJIT: add support for Giga mode
SPU ASMJIT: use the same spu.log location as SPU LLVM
SPU: improve spu.log disasm
SPU: improve trampolines, unify with SPU ASMJIT
SPU: decode interrupt handler address from BR/BRA at 0x0
SPU LLVM: support Mega/Giga modes
SPU LLVM: implement function chunks
SPU LLVM: use PHI nodes, value visibility across basic blocks
SPU LLVM: implement function chunk table
New simple memory manager for LLVM (bugfix)
 2018-06-21 22:29:34 +03:00
Nekotekina
5c9d0e4b46 Add "SPU Cache" option 
If disabled, the cache will still be loaded, but never updated.
 2018-06-05 12:35:26 +03:00
Nekotekina
5d4c5ecc1c Add "SPU Verification" option 
Should be always enabled
 2018-06-05 12:35:26 +03:00
Nekotekina
12eee6a19e SPU ASMJIT: Implement Mega block mode (experimental) 
Disable extra modes for SPU LLVM for now.
In Mega mode, SPU Analyser tries to determine complete functions.
Recompiler tries to speed up returns via 'stack mirror'.
 2018-06-05 12:35:26 +03:00
Nekotekina
11bdb4102a SPU LLVM: implement returnable check_state() 
Call it only at the beginning of loop entries
 2018-06-05 12:35:26 +03:00
Nekotekina
1e107487da SPU: improve analyser (v3) 2018-06-04 16:01:17 +03:00
Nekotekina
05e24f38f9 SPU: use progress dialog 2018-06-04 16:01:17 +03:00