mirror of
https://github.com/RPCS3/rpcs3.git
synced 2025-07-11 01:08:39 +12:00
PPU: Use SEQ-CST memory barrier in reservation load
This commit is contained in:
parent
8df1d74395
commit
a52a16807f
1 changed files with 3 additions and 0 deletions
|
@ -1076,6 +1076,9 @@ static void ppu_trace(u64 addr)
|
||||||
template <typename T>
|
template <typename T>
|
||||||
static T ppu_load_acquire_reservation(ppu_thread& ppu, u32 addr)
|
static T ppu_load_acquire_reservation(ppu_thread& ppu, u32 addr)
|
||||||
{
|
{
|
||||||
|
// Do not allow stores accessed from the same cache line to past reservation load
|
||||||
|
std::atomic_thread_fence(std::memory_order_seq_cst);
|
||||||
|
|
||||||
if (addr % sizeof(T))
|
if (addr % sizeof(T))
|
||||||
{
|
{
|
||||||
fmt::throw_exception("PPU %s: Unaligned address: 0x%08x" HERE, sizeof(T) == 4 ? "LWARX" : "LDARX", addr);
|
fmt::throw_exception("PPU %s: Unaligned address: 0x%08x" HERE, sizeof(T) == 4 ? "LWARX" : "LDARX", addr);
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue