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archive synced commits to nn at archive/rpcs3 from mirror 2025-02-02 06:55:05 +13:00
archive synced new reference nn to archive/rpcs3 from mirror 2025-02-02 06:55:05 +13:00
archive synced commits to refs/pull/11946/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
ab1312556b Merge 8560f0705e into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
665bb83297 Fix Savestates recent regression
Compare 5 commits »
archive synced commits to refs/pull/15956/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
4e7887be26 Merge c8850a5e9c into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
665bb83297 Fix Savestates recent regression
Compare 6 commits »
archive synced commits to refs/pull/16007/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
cb79dd570c Merge b9758d7af4 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16082/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
d447e44a36 Merge 8eb3db750bc95606d946bd8f655635c5f886a913 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16134/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
5b23f94b77 Merge f2686bba07ad5c27621ccd3751e0855ca1ffb220 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16410/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
a6c1277a4d Merge 940528f737 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
665bb83297 Fix Savestates recent regression
Compare 6 commits »
archive synced commits to refs/pull/16510/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
49be9522dd Merge c3b469a9ab into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16582/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
448165b63d Merge 1018e6a7dd into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16610/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
7b4f86ae35 Merge bd8e0299828284421b10f30876c2a9316711fff4 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16611/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
1d89593b5f Merge 8f3b9a9864 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16614/merge at archive/rpcs3 from mirror 2025-02-01 14:35:04 +13:00
046c100c84 Merge 3c53c52279 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
Compare 2 commits »
archive synced commits to refs/pull/14252/merge at archive/rpcs3 from mirror 2025-02-01 06:25:06 +13:00
52d80815ef Merge 4695e9c1f5 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16023/merge at archive/rpcs3 from mirror 2025-02-01 06:25:06 +13:00
716c2dc7a4 Merge b164a5830f89b67b504c2761781273c5ecc1b2b4 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16574/merge at archive/rpcs3 from mirror 2025-02-01 06:25:06 +13:00
969abe6e6a Merge 71ce4224fb into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16614/merge at archive/rpcs3 from mirror 2025-02-01 06:25:06 +13:00
38b2aa2284 Merge 3c53c52279 into 57b6ced957
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 3 commits »
archive synced commits to refs/pull/16618/head at archive/rpcs3 from mirror 2025-02-01 06:25:06 +13:00
91b1ba34c7 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
665bb83297 Fix Savestates recent regression
7fc0f69e48 PPU LLVM: Fix HLE patches
Compare 12 commits »
archive synced commits to refs/pull/16620/merge at archive/rpcs3 from mirror 2025-02-01 06:25:06 +13:00
9d16597b35 Merge d7411834279302829ab7c81de946f0d216e265b1 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »
archive synced commits to refs/pull/16632/merge at archive/rpcs3 from mirror 2025-02-01 06:25:06 +13:00
5cd0ce39ee Merge a4a45f0338 into 394fc8eb79
394fc8eb79 Enable Time-based TSC for non-Ryzen CPUs
57b6ced957 PPU Analyzer: Fix per-instruction code submission
506d92107c SPU LLVM: Use 512bit xorsum for SPU verification
Compare 4 commits »