mirror of
https://github.com/RPCS3/rpcs3.git
synced 2025-07-08 07:51:28 +12:00
289 lines
No EOL
7.3 KiB
C++
289 lines
No EOL
7.3 KiB
C++
#include "stdafx.h"
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#include "Emu/System.h"
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#include "Emu/ARMv7/PSVFuncList.h"
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#include "Emu/SysCalls/lv2/sys_time.h"
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#define RETURN_ERROR(code) { Emu.Pause(); scePerf.Error("%s() failed: %s", __FUNCTION__, #code); return code; }
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extern psv_log_base scePerf;
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enum
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{
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// Error Codes
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SCE_PERF_ERROR_INVALID_ARGUMENT = 0x80580000,
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};
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enum : s32
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{
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// Thread IDs
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SCE_PERF_ARM_PMON_THREAD_ID_ALL = -1,
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SCE_PERF_ARM_PMON_THREAD_ID_SELF = 0,
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};
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enum : u32
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{
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// Counter Numbers
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SCE_PERF_ARM_PMON_CYCLE_COUNTER = 31,
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SCE_PERF_ARM_PMON_COUNTER_5 = 5,
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SCE_PERF_ARM_PMON_COUNTER_4 = 4,
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SCE_PERF_ARM_PMON_COUNTER_3 = 3,
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SCE_PERF_ARM_PMON_COUNTER_2 = 2,
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SCE_PERF_ARM_PMON_COUNTER_1 = 1,
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SCE_PERF_ARM_PMON_COUNTER_0 = 0,
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// Counter Masks
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SCE_PERF_ARM_PMON_COUNTER_MASK_5 = 0x20,
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SCE_PERF_ARM_PMON_COUNTER_MASK_4 = 0x10,
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SCE_PERF_ARM_PMON_COUNTER_MASK_3 = 0x08,
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SCE_PERF_ARM_PMON_COUNTER_MASK_2 = 0x04,
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SCE_PERF_ARM_PMON_COUNTER_MASK_1 = 0x02,
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SCE_PERF_ARM_PMON_COUNTER_MASK_0 = 0x01,
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SCE_PERF_ARM_PMON_COUNTER_MASK_ALL = 0x3f,
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};
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enum : u8
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{
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// Performance Counter Events
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SCE_PERF_ARM_PMON_SOFT_INCREMENT = 0x00,
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SCE_PERF_ARM_PMON_ICACHE_MISS = 0x01,
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SCE_PERF_ARM_PMON_ITLB_MISS = 0x02,
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SCE_PERF_ARM_PMON_DCACHE_MISS = 0x03,
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SCE_PERF_ARM_PMON_DCACHE_ACCESS = 0x04,
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SCE_PERF_ARM_PMON_DTLB_MISS = 0x05,
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SCE_PERF_ARM_PMON_DATA_READ = 0x06,
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SCE_PERF_ARM_PMON_DATA_WRITE = 0x07,
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SCE_PERF_ARM_PMON_EXCEPTION_TAKEN = 0x09,
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SCE_PERF_ARM_PMON_EXCEPTION_RETURN = 0x0A,
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SCE_PERF_ARM_PMON_WRITE_CONTEXTID = 0x0B,
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SCE_PERF_ARM_PMON_SOFT_CHANGEPC = 0x0C,
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SCE_PERF_ARM_PMON_IMMEDIATE_BRANCH = 0x0D,
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SCE_PERF_ARM_PMON_UNALIGNED = 0x0F,
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SCE_PERF_ARM_PMON_BRANCH_MISPREDICT = 0x10,
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SCE_PERF_ARM_PMON_PREDICT_BRANCH = 0x12,
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SCE_PERF_ARM_PMON_COHERENT_LF_MISS = 0x50,
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SCE_PERF_ARM_PMON_COHERENT_LF_HIT = 0x51,
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SCE_PERF_ARM_PMON_ICACHE_STALL = 0x60,
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SCE_PERF_ARM_PMON_DCACHE_STALL = 0x61,
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SCE_PERF_ARM_PMON_MAINTLB_STALL = 0x62,
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SCE_PERF_ARM_PMON_STREX_PASSED = 0x63,
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SCE_PERF_ARM_PMON_STREX_FAILED = 0x64,
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SCE_PERF_ARM_PMON_DATA_EVICTION = 0x65,
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SCE_PERF_ARM_PMON_ISSUE_NO_DISPATCH = 0x66,
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SCE_PERF_ARM_PMON_ISSUE_EMPTY = 0x67,
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SCE_PERF_ARM_PMON_INST_RENAME = 0x68,
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SCE_PERF_ARM_PMON_PREDICT_FUNC_RET = 0x6E,
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SCE_PERF_ARM_PMON_MAIN_PIPE = 0x70,
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SCE_PERF_ARM_PMON_SECOND_PIPE = 0x71,
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SCE_PERF_ARM_PMON_LS_PIPE = 0x72,
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SCE_PERF_ARM_PMON_FPU_RENAME = 0x73,
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SCE_PERF_ARM_PMON_PLD_STALL = 0x80,
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SCE_PERF_ARM_PMON_WRITE_STALL = 0x81,
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SCE_PERF_ARM_PMON_INST_MAINTLB_STALL = 0x82,
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SCE_PERF_ARM_PMON_DATA_MAINTLB_STALL = 0x83,
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SCE_PERF_ARM_PMON_INST_UTLB_STALL = 0x84,
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SCE_PERF_ARM_PMON_DATA_UTLB_STALL = 0x85,
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SCE_PERF_ARM_PMON_DMB_STALL = 0x86,
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SCE_PERF_ARM_PMON_INTEGER_CLOCK = 0x8A,
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SCE_PERF_ARM_PMON_DATAENGINE_CLOCK = 0x8B,
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SCE_PERF_ARM_PMON_ISB = 0x90,
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SCE_PERF_ARM_PMON_DSB = 0x91,
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SCE_PERF_ARM_PMON_DMB = 0x92,
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SCE_PERF_ARM_PMON_EXT_INTERRUPT = 0x93,
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SCE_PERF_ARM_PMON_PLE_LINE_REQ_COMPLETED = 0xA0,
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SCE_PERF_ARM_PMON_PLE_CHANNEL_SKIPPED = 0xA1,
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SCE_PERF_ARM_PMON_PLE_FIFO_FLUSH = 0xA2,
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SCE_PERF_ARM_PMON_PLE_REQ_COMPLETED = 0xA3,
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SCE_PERF_ARM_PMON_PLE_FIFO_OVERFLOW = 0xA4,
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SCE_PERF_ARM_PMON_PLE_REQ_PROGRAMMED = 0xA5,
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};
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s32 scePerfArmPmonReset(ARMv7Context& context, s32 threadId)
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{
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scePerf.Warning("scePerfArmPmonReset(threadId=0x%x)", threadId);
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if (threadId != SCE_PERF_ARM_PMON_THREAD_ID_SELF)
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{
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throw __FUNCTION__;
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}
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context.counters = {};
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return SCE_OK;
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}
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s32 scePerfArmPmonSelectEvent(ARMv7Context& context, s32 threadId, u32 counter, u8 eventCode)
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{
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scePerf.Warning("scePerfArmPmonSelectEvent(threadId=0x%x, counter=0x%x, eventCode=0x%x)", threadId, counter, eventCode);
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if (threadId != SCE_PERF_ARM_PMON_THREAD_ID_SELF)
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{
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throw __FUNCTION__;
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}
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if (counter >= 6)
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{
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RETURN_ERROR(SCE_PERF_ERROR_INVALID_ARGUMENT);
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}
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u32 value = 0; // initial value
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switch (eventCode)
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{
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case SCE_PERF_ARM_PMON_SOFT_INCREMENT: break;
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case SCE_PERF_ARM_PMON_BRANCH_MISPREDICT:
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case SCE_PERF_ARM_PMON_DCACHE_MISS:
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case SCE_PERF_ARM_PMON_DCACHE_STALL:
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case SCE_PERF_ARM_PMON_ICACHE_STALL:
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case SCE_PERF_ARM_PMON_DATA_EVICTION:
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case SCE_PERF_ARM_PMON_WRITE_STALL:
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case SCE_PERF_ARM_PMON_MAINTLB_STALL:
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case SCE_PERF_ARM_PMON_UNALIGNED:
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{
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value = 1; // these events will probably never be implemented
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break;
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}
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case SCE_PERF_ARM_PMON_PREDICT_BRANCH:
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case SCE_PERF_ARM_PMON_DCACHE_ACCESS:
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{
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value = 1000; // these events will probably never be implemented
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break;
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}
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default: throw "scePerfArmPmonSelectEvent(): unknown event requested";
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}
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context.counters[counter].event = eventCode;
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context.counters[counter].value = value;
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return SCE_OK;
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}
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s32 scePerfArmPmonStart(ARMv7Context& context, s32 threadId)
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{
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scePerf.Warning("scePerfArmPmonStart(threadId=0x%x)", threadId);
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if (threadId != SCE_PERF_ARM_PMON_THREAD_ID_SELF)
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{
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throw __FUNCTION__;
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}
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return SCE_OK;
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}
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s32 scePerfArmPmonStop(ARMv7Context& context, s32 threadId)
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{
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scePerf.Warning("scePerfArmPmonStop(threadId=0x%x)");
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if (threadId != SCE_PERF_ARM_PMON_THREAD_ID_SELF)
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{
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throw __FUNCTION__;
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}
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return SCE_OK;
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}
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s32 scePerfArmPmonGetCounterValue(ARMv7Context& context, s32 threadId, u32 counter, vm::psv::ptr<u32> pValue)
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{
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scePerf.Warning("scePerfArmPmonGetCounterValue(threadId=0x%x, counter=%d, pValue=0x%x)", threadId, counter, pValue);
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if (threadId != SCE_PERF_ARM_PMON_THREAD_ID_SELF)
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{
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throw __FUNCTION__;
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}
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if (counter >= 6 && counter != SCE_PERF_ARM_PMON_CYCLE_COUNTER)
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{
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RETURN_ERROR(SCE_PERF_ERROR_INVALID_ARGUMENT);
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}
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if (counter < 6)
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{
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*pValue = context.counters[counter].value;
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}
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else
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{
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throw "scePerfArmPmonGetCounterValue(): cycle counter requested";
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}
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return SCE_OK;
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}
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s32 scePerfArmPmonSoftwareIncrement(ARMv7Context& context, u32 mask)
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{
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scePerf.Warning("scePerfArmPmonSoftwareIncrement(mask=0x%x)", mask);
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if (mask > SCE_PERF_ARM_PMON_COUNTER_MASK_ALL)
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{
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RETURN_ERROR(SCE_PERF_ERROR_INVALID_ARGUMENT);
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}
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for (u32 i = 0; i < 6; i++, mask >>= 1)
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{
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if (mask & 1)
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{
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context.counters[i].value++;
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}
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}
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return SCE_OK;
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}
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u64 scePerfGetTimebaseValue()
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{
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scePerf.Warning("scePerfGetTimebaseValue()");
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return get_system_time();
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}
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u32 scePerfGetTimebaseFrequency()
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{
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scePerf.Warning("scePerfGetTimebaseFrequency()");
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return 1;
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}
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s32 _sceRazorCpuInit(vm::psv::ptr<const void> pBufferBase, u32 bufferSize, u32 numPerfCounters, vm::psv::ptr<vm::psv::ptr<u32>> psceRazorVars)
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{
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throw __FUNCTION__;
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}
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s32 sceRazorCpuPushMarker(vm::psv::ptr<const char> szLabel)
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{
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throw __FUNCTION__;
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}
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s32 sceRazorCpuPopMarker()
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{
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throw __FUNCTION__;
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}
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s32 sceRazorCpuSync()
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{
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throw __FUNCTION__;
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}
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#define REG_FUNC(nid, name) reg_psv_func(nid, &scePerf, #name, name)
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psv_log_base scePerf("ScePerf", []()
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{
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scePerf.on_load = nullptr;
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scePerf.on_unload = nullptr;
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scePerf.on_stop = nullptr;
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REG_FUNC(0x35151735, scePerfArmPmonReset);
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REG_FUNC(0x63CBEA8B, scePerfArmPmonSelectEvent);
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REG_FUNC(0xC9D969D5, scePerfArmPmonStart);
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REG_FUNC(0xD1A40F54, scePerfArmPmonStop);
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REG_FUNC(0x6132A497, scePerfArmPmonGetCounterValue);
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//REG_FUNC(0x12F6C708, scePerfArmPmonSetCounterValue);
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REG_FUNC(0x4264B4E7, scePerfArmPmonSoftwareIncrement);
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REG_FUNC(0xBD9615E5, scePerfGetTimebaseValue);
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REG_FUNC(0x78EA4FFB, scePerfGetTimebaseFrequency);
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REG_FUNC(0x7AD6AC30, _sceRazorCpuInit);
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REG_FUNC(0xC3DE4C0A, sceRazorCpuPushMarker);
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REG_FUNC(0xDC3224C3, sceRazorCpuPopMarker);
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REG_FUNC(0x4F1385E3, sceRazorCpuSync);
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}); |