Commit graph

126 commits

Author SHA1 Message Date
Nekotekina
ca5158a03e Cleanup semaphore<> (sema.h) and mutex.h (shared_mutex)
Remove semaphore_lock and writer_lock classes, replace with std::lock_guard
Change semaphore<> interface to Lockable (+ exotic try_unlock method)
2018-09-03 23:00:36 +03:00
Nekotekina
8abe6489ed Mega-cleanup for atomic_t<> and named bit-sets bs_t<>
Remove "atomic operator" classes
Remove test, test_and_set, test_and_reset, test_and_complement global functions
Simplify atomic_t<> with constexpr if, remove some garbage
Redesign bs_t<> to use class, mark its methods constexpr
Implement atomic_bs_t<> for optimizations
Remove unused __bitwise_ops concept (should be in other header anyway)
Bitsets can now be tested via safe bool conversion
2018-09-03 21:40:36 +03:00
eladash
f349695a75 Rsx: rewrite address translation 2018-08-13 16:16:34 +03:00
scribam
1b0f5b1ed9 spu: improve dfnma instruction 2018-07-09 03:33:05 +04:00
Nekotekina
a0c0d8b993 SPU: simplify unimplemented event check
Move checks closer to the actual use
2018-07-06 00:33:52 +03:00
Nekotekina
cd92d9bcdf Fix SPU ASMJIT for SSE2 CPUs 2018-06-23 08:46:50 +03:00
Nekotekina
e4da284176 SPU: analyser v4 and fixes
Build SPU cache after PPU, fix mixing progress
SPU ASMJIT: add support for Giga mode
SPU ASMJIT: use the same spu.log location as SPU LLVM
SPU: improve spu.log disasm
SPU: improve trampolines, unify with SPU ASMJIT
SPU: decode interrupt handler address from BR/BRA at 0x0
SPU LLVM: support Mega/Giga modes
SPU LLVM: implement function chunks
SPU LLVM: use PHI nodes, value visibility across basic blocks
SPU LLVM: implement function chunk table
New simple memory manager for LLVM (bugfix)
2018-06-21 22:29:34 +03:00
Nekotekina
0a58464f01 SPU ASMJIT: returnable STOP in Mega mode
Fix STOP, STOPD, SYNC, DSYNC in Safe mode
2018-06-12 02:09:22 +03:00
Nekotekina
5c9d0e4b46 Add "SPU Cache" option
If disabled, the cache will still be loaded, but never updated.
2018-06-05 12:35:26 +03:00
Nekotekina
5d4c5ecc1c Add "SPU Verification" option
Should be always enabled
2018-06-05 12:35:26 +03:00
Nekotekina
12eee6a19e SPU ASMJIT: Implement Mega block mode (experimental)
Disable extra modes for SPU LLVM for now.
In Mega mode, SPU Analyser tries to determine complete functions.
Recompiler tries to speed up returns via 'stack mirror'.
2018-06-05 12:35:26 +03:00
Nekotekina
9fe03a94d8 SPU ASMJIT: implement returnable check_state() 2018-06-04 16:01:17 +03:00
Nekotekina
759370ea1b SPU: rewrite FSM/FSMH/FSMB instructions
Remove lookup tables
2018-05-30 20:35:35 +03:00
Nekotekina
944e89058e SPU: improve SHUFB 2018-05-30 20:35:35 +03:00
Nekotekina
3c70645f0b Update SPU cache (v2)
Improve SPU analyser: filter unreachable fragments
More strict NOP/LNOP analysis
Fill block predecessors info
ASMJIT: fix assertion and improve indirect branch
2018-05-13 20:40:23 +03:00
Nekotekina
be5c18cc85 SPU Re: more precise jt generation
Improve analyser, set v1
Fix branch indirect conditional
2018-05-12 23:50:49 +03:00
Nekotekina
fe4c3c4d84 Implement SPU recompiler cache
Shared between ASMJIT/LLVM recompilers, compiled at startup
2018-05-09 23:35:18 +03:00
Nekotekina
8f91917e8c SPU ASMJIT: simplify patchpoints
Remove SPU thread reference from spu_recompiler_base
Disable support for far jumps in pathpoints (they were rare and unsafe)
2018-05-09 22:19:55 +03:00
Nekotekina
767dfa271e SPU ASMJIT: internal jumptable
Allow indirect calls within current function using a jumptable
This restores some functionality removed in SPU ASMJIT 2.0
Change SPUThread::get_ch_value prototype
2018-05-08 13:05:29 +03:00
Nekotekina
df453d6d4f SPU ASMJIT: allow holes in raw block data
This is preparation for further changes.
This commit shouldn't affect anything.
2018-05-08 13:05:29 +03:00
Nekotekina
2fecddcde2 SPU ASMJIT: rewrite halt instruction
Use conditional memory access to invalid address.
This approach can allow continue (for debugging);
but at the same time it doesn't add function call to recompiled code.
2018-05-08 13:05:29 +03:00
Nekotekina
738a7cac4f SPU ASMJIT: inline WRCH 2018-04-22 00:06:49 +03:00
Nekotekina
2418de7e8b SPU ASMJIT: inline RDCH 2018-04-22 00:06:49 +03:00
Nekotekina
00ce814501 SPU ASMJIT: inline RCHCNT 2018-04-22 00:06:49 +03:00
Nekotekina
3ffafb741c SPU ASMJIT: übertrampolines and spu_runtime
Use opt-out shared spu_runtime to save memory (Option: SPU Shared Runtime)
Implement "übertrampolines" for dispatching compiled blocks
Patch fixed branch points to use trampolines after check failure
2018-04-22 00:06:49 +03:00
Nekotekina
8ca33bcb94 SPU ASMJIT v2.0
Use X86Assembler and blocks
2018-04-22 00:06:48 +03:00
Nekotekina
898637f830 Remove mfc_thread
Clear mfc_queue on reset
Improve MFC Proxy a bit
2018-03-31 21:13:12 +03:00
Nekotekina
445b7c0758 Optimize SPU interpreter
Made SPU decoder similar to PPU decoder
2018-03-01 16:13:35 +03:00
Nekotekina
439a78d12c SPU ASMJIT: rewrite 128-bit shifts by bit
Six instructions changed to use xmm registers instead of gpr.
ROTQBII, ROTQMBII, SHLQBII look better (shifts by imm)
ROTQBI, ROTQMBI, SHLQBI changed for consistency (shifts by variable)
2018-02-08 21:10:03 +03:00
Nekotekina
c7c49ab286 SPU ASMJIT: minor change to ROTH instruction
Only AVX-512 path is changed (third version).
This instruction is extremely rare.
And the code is probably not optimal.
So this commit is pretty useless.
2018-02-08 21:10:03 +03:00
Nekotekina
74834527eb SPU: rewrite ORX instruction 2018-02-08 21:10:03 +03:00
Nekotekina
9b9ac3ca62 SPU: emit VZEROUPPER
Workaround dirty AVX high state
2018-02-08 21:10:03 +03:00
Nekotekina
e2439e962c SPU: use XOP instructions 2018-02-08 20:46:13 +03:00
Nekotekina
84103b69cf SPU: 16-bit shifts for AVX2 2018-02-08 20:46:13 +03:00
Nekotekina
83b541ea9d SPU: rewrite ROTH (AVX-512) 2018-01-03 01:04:04 +03:00
Nekotekina
f271b650da SPU: minor addition for CFLTU, CUFLT 2017-12-29 03:09:35 +03:00
Nekotekina
39a3ed2d03 SPU: minor additions for AVX2+ 2017-12-27 02:51:58 +03:00
Nekotekina
f24491de84 SPU: fixes 2017-12-20 01:21:59 +03:00
Nekotekina
d3198ddf60 SPU: reorder some instructions for better throughput 2017-12-20 00:04:09 +03:00
Nekotekina
6d34dcd75f SPU: add some AVX-512 variants 2017-12-20 00:04:09 +03:00
Nekotekina
4aee4ed6d7 SPU: remove SSSE3 dependency 2017-12-20 00:04:08 +03:00
scribam
50f2be57f7 Spaces to tabs 2017-12-10 16:48:33 +04:00
Jake
d17093e65b spu: Fix interrupt jump check - also change interrupt variable to atomic bool for ease of setting/checking 2017-12-01 20:29:59 +03:00
Jake
8b476b5bfa spu: Recompiler Interrupt optimizations - Pigeonhole optimize for branching pattern that is used to enable and disable interrupts used in code, this should lower amount of blocks that are compiled and avoid falling out of a block - Recompiled interupt check in some cases to stay in block instead of falling out to dispatcher 2017-12-01 20:29:59 +03:00
Jake
ad97780c4f spu: Implement DFCMGT for interpreter and recompiler 2017-12-01 20:29:59 +03:00
kd-11
b338c81907 spu: Fixes (#3526)
* spu: Rewrite interpreter fast FM
- Partially implement accurate FM
- Fix FMA/FMS/FNMS by removing an optimization that does not work for INF (cmpunord)
- cmpunord does not catch all cases of an extended result/overflow
- NOTE: FM still does not handle corner cases well (e.g inf * 1.2 because SPU does not have concept of inf)
2017-10-04 20:58:06 +03:00
mp-t
607d2486ea Code review (#3114)
* Fix always-true conditions in sceNp module

* gl_render_targets: useless check on unsigned variable, possible bug

* fixed UB in crypto utility functions

* copy-paste error in vk::init_default_resources

* pass strings by const ref

* Dont copy vectors. Make sure copies are not needed because functions are used in a multi-threaded context.
2017-08-01 20:22:33 +03:00
kd-11
41d921808b spu: Reimplement FCGT and FCMGT to handle corner cases (such as comparisons against infinites and denormals)
- Also optimize FMA/FMS/FNMS for recompiler
2017-07-08 14:52:16 +03:00
Nekotekina
f010b5b235 Configuration simplified 2017-05-20 16:01:48 +03:00
Zion
c133db6721 Update asmjit submodule (Testers wanted!) (#2782)
* Update asmjit submodule

* Add myself as a contributor 	😉
2017-05-18 14:22:45 +03:00