Commit graph

640 commits

Author SHA1 Message Date
Eladash
2815aecd0c Savestates: Save SPU decrementer state 2022-07-06 19:43:25 +03:00
Elad Ashkenazi
fcd297ffb2
Savestates Support For PS3 Emulation (#10478) 2022-07-04 16:02:17 +03:00
Eladash
cf0fcf5a2a SPU: Implement execution wake-up delay 2022-06-28 19:54:25 +03:00
Eladash
5e01ffdfd8 Debugger: Optimize cpu_thread::dump_regs()
Reuse string buffer. Copies and reallocations are expensive with such large strings.
2022-06-23 22:41:32 +02:00
Nekotekina
653a9e6e7f Debugger: always print cpu_thread::dump_misc()
Was removed for some reason.
2022-06-22 18:53:29 +03:00
Eladash
ccb2724fc4 Debugger: Implement SPU breakpoints 2022-06-21 16:59:45 +03:00
Eladash
d0e9108800 SPU: Implement "double" SNR storage 2022-06-20 20:50:11 +03:00
Jeff Guo
cefc37a553
PPU LLVM arm64+macOS port (#12115)
* BufferUtils: use naive function pointer on Apple arm64

Use naive function pointer on Apple arm64 because ASLR breaks asmjit.
See BufferUtils.cpp comment for explanation on why this happens and how
to fix if you want to use asmjit.

* build-macos: fix source maps for Mac

Tell Qt not to strip debug symbols when we're in debug or relwithdebinfo
modes.

* LLVM PPU: fix aarch64 on macOS

Force MachO on macOS to fix LLVM being unable to patch relocations
during codegen. Adds Aarch64 NEON intrinsics for x86 intrinsics used by
PPUTranslator/Recompiler.

* virtual memory: use 16k pages on aarch64 macOS

Temporary hack to get things working by using 16k pages instead of 4k
pages in VM emulation.

* PPU/SPU: fix NEON intrinsics and compilation for arm64 macOS

Fixes some intrinsics usage and patches usages of asmjit to properly
emit absolute jmps so ASLR doesn't cause out of bounds rel jumps. Also
patches the SPU recompiler to properly work on arm64 by telling LLVM to
target arm64.

* virtual memory: fix W^X toggles on macOS aarch64

Fixes W^X on macOS aarch64 by setting all JIT mmap'd regions to default
to RW mode. For both SPU and PPU execution threads, when initialization
finishes we toggle to RX mode. This exploits Apple's per-thread setting
for RW/RX to let us be technically compliant with the OS's W^X
    enforcement while not needing to actually separate the memory
    allocated for code/data.

* PPU: implement aarch64 specific functions

Implements ppu_gateway for arm64 and patches LLVM initialization to use
the correct triple. Adds some fixes for macOS W^X JIT restrictions when
entering/exiting JITed code.

* PPU: Mark rpcs3 calls as non-tail

Strictly speaking, rpcs3 JIT -> C++ calls are not tail calls. If you
call a function inside e.g. an L2 syscall, it will clobber LR on arm64
and subtly break returns in emulated code. Only JIT -> JIT "calls"
should be tail.

* macOS/arm64: compatibility fixes

* vm: patch virtual memory for arm64 macOS

Tag mmap calls with MAP_JIT to allow W^X on macOS. Fix mmap calls to
existing mmap'd addresses that were tagged with MAP_JIT on macOS. Fix
memory unmapping on 16K page machines with a hack to mark "unmapped"
pages as RW.

* PPU: remove wrong comment

* PPU: fix a merge regression

* vm: remove 16k page hacks

* PPU: formatting fixes

* PPU: fix arm64 null function assembly

* ppu: clean up arch-specific instructions
2022-06-14 15:28:38 +03:00
Elad Ashkenazi
9bb7e8d614
rsx: Implement atomic FIFO fetching (stability improvement) (non-default setting) (#12107) 2022-06-04 15:35:06 +03:00
Eladash
e7ced1aeab Debugger: Implement SPU mailbox content display 2022-05-25 17:36:28 +03:00
Eladash
961d41d0bd RawSPU: Reinvoke pending interrupts if missed 2022-05-25 11:46:51 +03:00
Eladash
2ba437b6dc SPU: Implement timer freezing ability 2022-05-14 22:03:47 +03:00
Eladash
d77c9139ad Debugger: Show constant-formed attribute of register value 2022-05-10 22:34:29 +03:00
Eladash
be5f8413ca
Avoid using PUTLLC in PUTLLUC if we know SPU LR has already been raised (#11940) 2022-05-05 22:15:08 +03:00
Nekotekina
10b33d0f79 SPU: optimize conflicting PUTLLUC (No-TSX)
Enable previously TSX-only optimization.
2022-05-05 19:16:16 +03:00
Eladash
fcbeb2fa22 Remove slow vm::writer_lock usage from SPUThread.cpp 2022-05-04 23:36:57 +03:00
Eladash
3dda72e47f SPU: Cache reservation memory direct access handle (optimization) 2022-05-04 20:28:55 +03:00
RipleyTom
a4d715e25d Warning Fixes 2022-03-23 19:35:10 +01:00
Nekotekina
14951d8713 Fix abuse of fs::pending_file
Debug dumps don't fall into category which needs atomic rewrite.
2022-01-24 22:39:01 +03:00
Nekotekina
12c83b340d Remove built_function
With today's branch prediction techniques, it's hardly useful.
2022-01-24 22:21:41 +03:00
Nekotekina
580bd2b25e Initial Linux Aarch64 support
* Update asmjit dependency (aarch64 branch)
* Disable USE_DISCORD_RPC by default
* Dump some JIT objects in rpcs3 cache dir
* Add SIGILL handler for all platforms
* Fix resetting zeroing denormals in thread pool
* Refactor most v128:: utils into global gv_** functions
* Refactor PPU interpreter (incomplete), remove "precise"
* - Instruction specializations with multiple accuracy flags
* - Adjust calling convention for speed
* - Removed precise/fast setting, replaced with static
* - Started refactoring interpreters for building at runtime JIT
*   (I got tired of poor compiler optimizations)
* - Expose some accuracy settings (SAT, NJ, VNAN, FPCC)
* - Add exec_bytes PPU thread variable (akin to cycle count)
* PPU LLVM: fix VCTUXS+VCTSXS instruction NaN results
* SPU interpreter: remove "precise" for now (extremely non-portable)
* - As with PPU, settings changed to static/dynamic for interpreters.
* - Precise options will be implemented later
* Fix termination after fatal error dialog
2022-01-15 06:48:04 +03:00
Malcolm Jestadt
31a5a77ae5 SPU: Use REP MOVSB in do_dma_transfer
- Try to use REP MOVSB when the size of the transfer is above a certain threshold
- This threshold is determined by the ERMS and FSRM cpuid flags
- The threshold values are (roughly) taken from GLIBC
- A threshold of 0xFFFFFFFF indicates that the cpu has neither flag
2022-01-02 21:35:46 +03:00
Nekotekina
cb2748ae08 Update ASMJIT (new upstream API) 2021-12-29 02:45:00 +03:00
Nekotekina
d836033212 LLVM: enable some JIT events (Intel, Perf)
Made some related adjustments.
Currently incomplete.
2021-12-26 16:41:37 +03:00
Nekotekina
dcd011048d Implement "built_function" utility (runtime-generated assembly)
Similar to build_function_asm, but links without indirection.
Achieved by emitting code directly into a byte array.
2021-12-22 19:27:20 +03:00
Nekotekina
c0bafbc804 TSX: enable same data optimization for PUTLLC 2021-12-19 20:23:01 +03:00
Nekotekina
61c64d1060 TSX: refactoring M
Remove first stage 'optimistic' transactions.
2021-12-19 20:23:01 +03:00
Nekotekina
3e1e1a683c TSX/PPU: fix conditional store regression 2021-12-17 21:48:01 +03:00
Eladash
c0c52c33b9 SPU: Implement interrupts handling for remaining events 2021-10-20 15:46:50 +03:00
Eladash
ab50e5483e
GUI Utilities: Implement instruction search, PPU/SPU disasm improvements (#10968)
* GUI Utilities: Implement instruction search in PS3 memory
* String Searcher: Case insensitive search
* PPU DisAsm: Comment constants with ORI
* PPU DisAsm: Add 64-bit constant support
* SPU/PPU DisAsm: Print CELL errors in disasm
* PPU DisAsm: Constant comparison support
2021-10-12 23:12:30 +03:00
Eladash
e10c6cbaf7 SPU: cpu_work() fixup, fix recursion in AV handler 2021-09-18 19:43:55 +03:00
Eladash
5870da0b55 SPU MFC: Add shuffling in steps setting 2021-09-18 19:43:55 +03:00
Eladash
ddec5d6908 CPUThread: Prevent recursive check_state calls 2021-09-17 14:02:22 +03:00
Eladash
975aae1d13 SPU MFC: Implement MFC commands execution shuffling 2021-09-17 11:38:10 +03:00
Eladash
fafefb2cf5 Fixup No.3 after #10779 2021-09-10 11:46:39 +03:00
Megamouse
0debcfed0a Silence some warnings 2021-09-02 19:39:42 +02:00
Eladash
063df64108 SPU/event queue: Implement protocol for SPU queue 2021-08-13 08:58:09 +03:00
Eladash
f1f93b8f81 SPU: Remove outdated assertation 2021-08-13 08:58:09 +03:00
Eladash
91737b11fe Fix sys_spu_thread_group_resume
Do not remove suspend flag when SPU group state is not SPU_THREAD_GROUP_STATUS_RUNNING after operation!
2021-08-12 22:24:54 +03:00
Eladash
bf61c826d5 SPU/event queue: Atomically resume SPU group 2021-08-12 22:24:54 +03:00
Eladash
8e2c34a003 PPU debugger: Implement PPU calling history 2021-07-17 17:28:23 +02:00
Nekotekina
160b131de3 types.hpp: implement smin, smax, amin, amax
Rewritten the following global utility constants:
`umax` returns max number, restricted to unsigned.
`smax` returns max signed number, restricted to integrals.
`smin` returns min signed number, restricted to signed.
`amin` returns smin or zero, less restricted.
`amax` returns smax or umax, less restricted.

Fix operators == and <=> for synthesized rel-ops.
2021-05-22 12:10:57 +03:00
Eladash
638f20c80f Improve get_current_cpu_thread() 2021-05-20 09:25:51 +03:00
Eladash
8bd58b1ad4 Remove lv2_event_queue::check(weak_ptr) 2021-05-15 00:31:14 +03:00
Eladash
c681395fb2 sys_interrupt: weak_ptr -> shared_ptr 2021-05-15 00:31:14 +03:00
Eladash
56471f4ad4 SPU: Optimize SPU ports/queues 2021-05-15 00:31:14 +03:00
Eladash
daa53b77cf Simplify named_thread construction 2021-05-01 18:08:03 +03:00
Megamouse
a16d8ba3ea More random changes 2021-04-11 14:01:51 +03:00
Nekotekina
95725bf7fc Add -Werror=missing-noreturn (GCC, clang)
May be useful to diagnose functions which fail assertions unconditionally.
2021-04-08 10:29:47 +03:00
Nekotekina
b3fb6d7d18 Add and fix -Wredundant-decls (GCC) 2021-03-23 22:48:57 +03:00