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Compilation fix
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parent
dc6c21833d
commit
f095dec43d
2 changed files with 5 additions and 5 deletions
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@ -34,7 +34,7 @@ if (NOT MSVC)
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set(CMAKE_C_FLAGS_MINSIZEREL "${CMAKE_C_FLAGS_MINSIZEREL} -Os -D_NDEBUG")
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set(CMAKE_C_FLAGS_MINSIZEREL "${CMAKE_C_FLAGS_MINSIZEREL} -Os -D_NDEBUG")
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set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -O1 -D_NDEBUG")
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set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -O1 -D_NDEBUG")
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set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS_RELWITHDEBINFO} -O1 -g -D_NDEBUG")
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set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS_RELWITHDEBINFO} -O1 -g -D_NDEBUG")
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add_definitions(-msse2 -mcx16)
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add_definitions(-msse -msse2 -mcx16 -mssse3)
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endif()
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endif()
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if (APPLE)
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if (APPLE)
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@ -676,7 +676,7 @@ void spu_interpreter::ANDC(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::FCGT(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::FCGT(SPUThread& CPU, spu_opcode_t op)
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{
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{
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CPU.GPR[op.rt].vf = _mm_cmp_ps(CPU.GPR[op.rb].vf, CPU.GPR[op.ra].vf, 1);
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CPU.GPR[op.rt].vf = _mm_cmplt_ps(CPU.GPR[op.rb].vf, CPU.GPR[op.ra].vf);
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}
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}
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void spu_interpreter::DFCGT(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::DFCGT(SPUThread& CPU, spu_opcode_t op)
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@ -713,7 +713,7 @@ void spu_interpreter::ORC(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::FCMGT(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::FCMGT(SPUThread& CPU, spu_opcode_t op)
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{
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{
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const auto mask = _mm_castsi128_ps(_mm_set1_epi32(0x7fffffff));
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const auto mask = _mm_castsi128_ps(_mm_set1_epi32(0x7fffffff));
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CPU.GPR[op.rt].vf = _mm_cmp_ps(_mm_and_ps(CPU.GPR[op.rb].vf, mask), _mm_and_ps(CPU.GPR[op.ra].vf, mask), 1);
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CPU.GPR[op.rt].vf = _mm_cmplt_ps(_mm_and_ps(CPU.GPR[op.rb].vf, mask), _mm_and_ps(CPU.GPR[op.ra].vf, mask));
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}
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}
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void spu_interpreter::DFCMGT(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::DFCMGT(SPUThread& CPU, spu_opcode_t op)
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@ -850,7 +850,7 @@ void spu_interpreter::DFTSV(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::FCEQ(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::FCEQ(SPUThread& CPU, spu_opcode_t op)
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{
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{
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CPU.GPR[op.rt].vf = _mm_cmp_ps(CPU.GPR[op.rb].vf, CPU.GPR[op.ra].vf, 0);
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CPU.GPR[op.rt].vf = _mm_cmpeq_ps(CPU.GPR[op.rb].vf, CPU.GPR[op.ra].vf);
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}
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}
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void spu_interpreter::DFCEQ(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::DFCEQ(SPUThread& CPU, spu_opcode_t op)
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@ -887,7 +887,7 @@ void spu_interpreter::CEQH(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::FCMEQ(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::FCMEQ(SPUThread& CPU, spu_opcode_t op)
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{
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{
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const auto mask = _mm_castsi128_ps(_mm_set1_epi32(0x7fffffff));
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const auto mask = _mm_castsi128_ps(_mm_set1_epi32(0x7fffffff));
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CPU.GPR[op.rt].vf = _mm_cmp_ps(_mm_and_ps(CPU.GPR[op.rb].vf, mask), _mm_and_ps(CPU.GPR[op.ra].vf, mask), 0);
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CPU.GPR[op.rt].vf = _mm_cmpeq_ps(_mm_and_ps(CPU.GPR[op.rb].vf, mask), _mm_and_ps(CPU.GPR[op.ra].vf, mask));
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}
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}
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void spu_interpreter::DFCMEQ(SPUThread& CPU, spu_opcode_t op)
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void spu_interpreter::DFCMEQ(SPUThread& CPU, spu_opcode_t op)
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