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Disable SPU asmjit on ARM. Only supported on x86

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Vestral 2025-03-21 09:48:31 +09:00 • committed by Megamouse
parent 77eef4d783
commit e110334c2c
3 changed files with 51 additions and 8 deletions
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25
rpcs3/Emu/Cell/SPUCommonRecompiler.cpp
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@ -842,6 +842,7 @@ void spu_cache::initialize(bool build_existing_cache)
// Initialize compiler instances for parallel compilation
std::unique_ptr<spu_recompiler_base> compiler;
#if defined(ARCH_X64)
if (g_cfg.core.spu_decoder == spu_decoder_type::asmjit)
{
compiler = spu_recompiler_base::make_asmjit_recompiler();
@ -850,6 +851,22 @@ void spu_cache::initialize(bool build_existing_cache)
{
compiler = spu_recompiler_base::make_llvm_recompiler();
}
else
{
fmt::throw_exception("Unsupported spu decoder '%s'", g_cfg.core.spu_decoder);
}
#elif defined(ARCH_ARM64)
if (g_cfg.core.spu_decoder == spu_decoder_type::llvm)
{
compiler = spu_recompiler_base::make_llvm_recompiler();
}
else
{
fmt::throw_exception("Unsupported spu decoder '%s'", g_cfg.core.spu_decoder);
}
#else
#error "Unimplemented"
#endif
compiler->init();
@ -2545,7 +2562,7 @@ bool reg_state_t::is_const() const
bool reg_state_t::compare_tags(const reg_state_t& rhs) const
{
// Compare by tag, address of instruction origin
// Compare by tag, address of instruction origin
return tag == rhs.tag && origin == rhs.origin && is_instruction == rhs.is_instruction;
}
@ -6066,7 +6083,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
else if (atomic16->ls_offs.compare_with_mask_indifference(atomic16->lsa, SPU_LS_MASK_128) && atomic16->ls.is_less_than(128 - (atomic16->ls_offs.value & 127)))
{
// Relative memory access with offset less than 128 bytes
// Common around SPU utilities which have less strict restrictions about memory alignment
// Common around SPU utilities which have less strict restrictions about memory alignment
ok = true;
}
}
@ -6340,7 +6357,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
{
atomic16->mem_count++;
// Do not clear lower 16 bytes addressing because the program can move on 4-byte basis
// Do not clear lower 16 bytes addressing because the program can move on 4-byte basis
const u32 offs = spu_branch_target(pos - result.lower_bound, op.si16);
if (atomic16->lsa.is_const() && [&]()
@ -8142,7 +8159,7 @@ std::array<reg_state_t, s_reg_max>& block_reg_info::evaluate_start_state(const s
// Check if the node is resolved
if (!node->has_true_state)
{
// Assume this block cannot be resolved at the moment
// Assume this block cannot be resolved at the moment
is_all_resolved = false;
break;
}