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rsx: Unify fragment texture config changes dirty bit tracking

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- Reverts unnecessary changes to dirty tracking.
- The GPU keeps a separate set of details, so all dirty bits are treated equal.
This commit is contained in:
kd-11 2025-03-08 19:43:10 +03:00 • committed by kd-11
parent a39a743abe
commit df7a2ab467
4 changed files with 14 additions and 23 deletions
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2
rpcs3/Emu/RSX/NV47/HW/common.cpp
View file

@ -62,7 +62,7 @@ namespace rsx
return vm::cast(get_address(offset, location)); return vm::cast(get_address(offset, location));
} }
void set_fragment_texture_dirty_bit(rsx::context* ctx, u32 arg, u32 index, bool /*is_shader_config*/) void set_fragment_texture_dirty_bit(rsx::context* ctx, u32 arg, u32 index)
{ {
if (REGS(ctx)->latch == arg) if (REGS(ctx)->latch == arg)
{ {

2
rpcs3/Emu/RSX/NV47/HW/common.h
View file

@ -17,7 +17,7 @@ namespace rsx
void push_draw_parameter_change(rsx::context* ctx, rsx::command_barrier_type type, u32 reg, u32 arg0, u32 arg1 = 0u, u32 index = 0u); void push_draw_parameter_change(rsx::context* ctx, rsx::command_barrier_type type, u32 reg, u32 arg0, u32 arg1 = 0u, u32 index = 0u);
void set_fragment_texture_dirty_bit(rsx::context* ctx, u32 arg, u32 index, bool is_shader_config); void set_fragment_texture_dirty_bit(rsx::context* ctx, u32 arg, u32 index);
void set_texture_configuration_command(rsx::context* ctx, u32 reg); void set_texture_configuration_command(rsx::context* ctx, u32 reg);

13
rpcs3/Emu/RSX/NV47/HW/nv4097.h
View file

@ -221,15 +221,6 @@ namespace rsx
} }
}; };
template <u32 index>
struct set_texture_dirty_bit_texture_config
{
static void impl(context* ctx, u32 /*reg*/, u32 arg)
{
util::set_fragment_texture_dirty_bit(ctx, arg, index, true);
}
};
template <u32 index> template <u32 index>
struct set_texture_offset struct set_texture_offset
{ {
@ -241,11 +232,11 @@ namespace rsx
}; };
template <u32 index> template <u32 index>
struct set_texture_dirty_bit_location_and_area struct set_fragment_texture_dirty_bit
{ {
static void impl(context* ctx, u32 /*reg*/, u32 arg) static void impl(context* ctx, u32 /*reg*/, u32 arg)
{ {
util::set_fragment_texture_dirty_bit(ctx, arg, index, false); util::set_fragment_texture_dirty_bit(ctx, arg, index);
} }
}; };

20
rpcs3/Emu/RSX/rsx_methods.cpp
View file

@ -1663,16 +1663,16 @@ namespace rsx
bind(NV4097_SET_SURFACE_PITCH_D, nv4097::set_surface_dirty_bit); bind(NV4097_SET_SURFACE_PITCH_D, nv4097::set_surface_dirty_bit);
bind(NV4097_SET_SURFACE_PITCH_Z, nv4097::set_surface_dirty_bit); bind(NV4097_SET_SURFACE_PITCH_Z, nv4097::set_surface_dirty_bit);
bind(NV4097_SET_WINDOW_OFFSET, nv4097::set_surface_dirty_bit); bind(NV4097_SET_WINDOW_OFFSET, nv4097::set_surface_dirty_bit);
bind_range<NV4097_SET_TEXTURE_OFFSET, 8, 16, nv4097::set_texture_dirty_bit_location_and_area>(); bind_range<NV4097_SET_TEXTURE_OFFSET, 8, 16, nv4097::set_fragment_texture_dirty_bit>();
bind_range<NV4097_SET_TEXTURE_FORMAT, 8, 16, nv4097::set_texture_dirty_bit_texture_config>(); bind_range<NV4097_SET_TEXTURE_FORMAT, 8, 16, nv4097::set_fragment_texture_dirty_bit>();
bind_range<NV4097_SET_TEXTURE_ADDRESS, 8, 16, nv4097::set_texture_dirty_bit_texture_config>(); bind_range<NV4097_SET_TEXTURE_ADDRESS, 8, 16, nv4097::set_fragment_texture_dirty_bit>();
bind_range<NV4097_SET_TEXTURE_CONTROL0, 8, 16, nv4097::set_texture_dirty_bit_texture_config>(); bind_range<NV4097_SET_TEXTURE_CONTROL0, 8, 16, nv4097::set_fragment_texture_dirty_bit>();
bind_range<NV4097_SET_TEXTURE_CONTROL1, 8, 16, nv4097::set_texture_dirty_bit_texture_config>(); bind_range<NV4097_SET_TEXTURE_CONTROL1, 8, 16, nv4097::set_fragment_texture_dirty_bit>();
bind_range<NV4097_SET_TEXTURE_FILTER, 8, 16, nv4097::set_texture_dirty_bit_texture_config>(); bind_range<NV4097_SET_TEXTURE_FILTER, 8, 16, nv4097::set_fragment_texture_dirty_bit>();
bind_range<NV4097_SET_TEXTURE_IMAGE_RECT, 8, 16, nv4097::set_texture_dirty_bit_location_and_area>(); bind_range<NV4097_SET_TEXTURE_IMAGE_RECT, 8, 16, nv4097::set_fragment_texture_dirty_bit>();
bind_range<NV4097_SET_TEXTURE_BORDER_COLOR, 8, 16, nv4097::set_texture_dirty_bit_texture_config>(); bind_range<NV4097_SET_TEXTURE_BORDER_COLOR, 8, 16, nv4097::set_fragment_texture_dirty_bit>();
bind_range<NV4097_SET_TEXTURE_CONTROL2, 1, 16, nv4097::set_texture_dirty_bit_texture_config>(); bind_range<NV4097_SET_TEXTURE_CONTROL2, 1, 16, nv4097::set_fragment_texture_dirty_bit>();
bind_range<NV4097_SET_TEXTURE_CONTROL3, 1, 16, nv4097::set_texture_dirty_bit_texture_config>(); bind_range<NV4097_SET_TEXTURE_CONTROL3, 1, 16, nv4097::set_fragment_texture_dirty_bit>();
bind_range<NV4097_SET_VERTEX_TEXTURE_OFFSET, 8, 4, nv4097::set_vertex_texture_dirty_bit>(); bind_range<NV4097_SET_VERTEX_TEXTURE_OFFSET, 8, 4, nv4097::set_vertex_texture_dirty_bit>();
bind_range<NV4097_SET_VERTEX_TEXTURE_FORMAT, 8, 4, nv4097::set_vertex_texture_dirty_bit>(); bind_range<NV4097_SET_VERTEX_TEXTURE_FORMAT, 8, 4, nv4097::set_vertex_texture_dirty_bit>();
bind_range<NV4097_SET_VERTEX_TEXTURE_ADDRESS, 8, 4, nv4097::set_vertex_texture_dirty_bit>(); bind_range<NV4097_SET_VERTEX_TEXTURE_ADDRESS, 8, 4, nv4097::set_vertex_texture_dirty_bit>();