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Merge pull request #839 from gopalsr83/master

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Minor fixes to PPU interpreter.
This commit is contained in:
B1ackDaemon 2014-10-17 01:13:20 +03:00
commit d5a8675d1e
2 changed files with 10 additions and 17 deletions
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18
rpcs3/Emu/Cell/PPUInterpreter.h
View file

@ -1,6 +1,7 @@
#pragma once #pragma once
#include "Emu/Cell/PPUOpcodes.h" #include "Emu/Cell/PPUOpcodes.h"
#include "Emu/SysCalls/lv2/sys_time.h"
#include <stdint.h> #include <stdint.h>
#ifdef _MSC_VER #ifdef _MSC_VER
@ -425,6 +426,7 @@ private:
} }
// Bit n°2 of CR6 // Bit n°2 of CR6
CPU.SetCR(6, 0);
CPU.SetCRBit(6, 0x2, allInBounds); CPU.SetCRBit(6, 0x2, allInBounds);
} }
void VCMPEQFP(u32 vd, u32 va, u32 vb) void VCMPEQFP(u32 vd, u32 va, u32 vb)
@ -2199,7 +2201,7 @@ private:
} }
void ORIS(u32 ra, u32 rs, u32 uimm16) void ORIS(u32 ra, u32 rs, u32 uimm16)
{ {
CPU.GPR[ra] = CPU.GPR[rs] | (uimm16 << 16); CPU.GPR[ra] = CPU.GPR[rs] | ((u64)uimm16 << 16);
} }
void XORI(u32 ra, u32 rs, u32 uimm16) void XORI(u32 ra, u32 rs, u32 uimm16)
{ {
@ -2207,7 +2209,7 @@ private:
} }
void XORIS(u32 ra, u32 rs, u32 uimm16) void XORIS(u32 ra, u32 rs, u32 uimm16)
{ {
CPU.GPR[ra] = CPU.GPR[rs] ^ (uimm16 << 16); CPU.GPR[ra] = CPU.GPR[rs] ^ ((u64)uimm16 << 16);
} }
void ANDI_(u32 ra, u32 rs, u32 uimm16) void ANDI_(u32 ra, u32 rs, u32 uimm16)
{ {
@ -2216,7 +2218,7 @@ private:
} }
void ANDIS_(u32 ra, u32 rs, u32 uimm16) void ANDIS_(u32 ra, u32 rs, u32 uimm16)
{ {
CPU.GPR[ra] = CPU.GPR[rs] & (uimm16 << 16); CPU.GPR[ra] = CPU.GPR[rs] & ((u64)uimm16 << 16);
CPU.UpdateCR0<s64>(CPU.GPR[ra]); CPU.UpdateCR0<s64>(CPU.GPR[ra]);
} }
void RLDICL(u32 ra, u32 rs, u32 sh, u32 mb, bool rc) void RLDICL(u32 ra, u32 rs, u32 sh, u32 mb, bool rc)
@ -2244,11 +2246,11 @@ private:
{ {
if (is_r) // rldcr if (is_r) // rldcr
{ {
RLDICR(ra, rs, (u32)CPU.GPR[rb], m_eb, rc); RLDICR(ra, rs, (u32)(CPU.GPR[rb] & 0x3F), m_eb, rc);
} }
else // rldcl else // rldcl
{ {
RLDICL(ra, rs, (u32)CPU.GPR[rb], m_eb, rc); RLDICL(ra, rs, (u32)(CPU.GPR[rb] & 0x3F), m_eb, rc);
} }
} }
void CMP(u32 crfd, u32 l, u32 ra, u32 rb) void CMP(u32 crfd, u32 l, u32 ra, u32 rb)
@ -2395,8 +2397,7 @@ private:
} }
CPU.GPR[ra] = i; CPU.GPR[ra] = i;
if(rc) CPU.UpdateCR0<s64>(CPU.GPR[ra]);
if(rc) CPU.SetCRBit(CR_LT, false);
} }
void SLD(u32 ra, u32 rs, u32 rb, bool rc) void SLD(u32 ra, u32 rs, u32 rb, bool rc)
{ {
@ -2480,7 +2481,7 @@ private:
} }
CPU.GPR[ra] = i; CPU.GPR[ra] = i;
if(rc) CPU.SetCRBit(CR_LT, false); if(rc) CPU.UpdateCR0<s64>(CPU.GPR[ra]);
} }
void ANDC(u32 ra, u32 rs, u32 rb, bool rc) void ANDC(u32 ra, u32 rs, u32 rb, bool rc)
{ {
@ -2801,6 +2802,7 @@ private:
{ {
const u32 n = (spr >> 5) | ((spr & 0x1f) << 5); const u32 n = (spr >> 5) | ((spr & 0x1f) << 5);
CPU.TB = get_time();
switch(n) switch(n)
{ {
case 0x10C: CPU.GPR[rd] = CPU.TB; break; case 0x10C: CPU.GPR[rd] = CPU.TB; break;

9
rpcs3/Emu/Cell/PPUThread.h
View file

@ -796,15 +796,6 @@ protected:
virtual void DoPause() override; virtual void DoPause() override;
virtual void DoResume() override; virtual void DoResume() override;
virtual void DoStop() override; virtual void DoStop() override;
virtual void Step() override
{
//if(++cycle > 20)
{
TB++;
//cycle = 0;
}
}
}; };
PPUThread& GetCurrentPPUThread(); PPUThread& GetCurrentPPUThread();