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SPU: IRET, SN event
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parent
64ac6a59c4
commit
d2ddb9882f
6 changed files with 49 additions and 36 deletions
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@ -146,6 +146,7 @@ void SPUThread::cpu_init()
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ch_mfc_args = {};
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mfc_queue.clear();
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srr0 = 0;
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ch_tag_mask = 0;
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ch_tag_stat.data.store({});
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ch_stall_stat.data.store({});
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@ -371,6 +372,7 @@ void SPUThread::do_dma_list_cmd(u32 cmd, spu_mfc_arg_t args)
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if (rec->sb & 0x8000)
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{
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ch_stall_stat.set_value((1 << args.tag) | ch_stall_stat.get_value());
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ch_event_stat |= SPU_EVENT_SN;
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spu_mfc_arg_t stalled;
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stalled.ea = (args.ea & ~0xffffffff) | (list_addr + (i + 1) * 8);
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@ -418,11 +420,6 @@ void SPUThread::process_mfc_cmd(u32 cmd)
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case MFC_GETLLAR_CMD: // acquire reservation
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{
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if (ch_mfc_args.size != 128)
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{
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break;
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}
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const u32 raddr = vm::cast(ch_mfc_args.ea, HERE);
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vm::reservation_acquire(vm::base(offset + ch_mfc_args.lsa), raddr, 128);
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@ -437,11 +434,6 @@ void SPUThread::process_mfc_cmd(u32 cmd)
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case MFC_PUTLLC_CMD: // store conditionally
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{
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if (ch_mfc_args.size != 128)
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{
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break;
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}
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if (vm::reservation_update(vm::cast(ch_mfc_args.ea, HERE), vm::base(offset + ch_mfc_args.lsa), 128))
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{
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if (std::exchange(last_raddr, 0) == 0)
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@ -465,11 +457,6 @@ void SPUThread::process_mfc_cmd(u32 cmd)
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case MFC_PUTLLUC_CMD: // store unconditionally
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case MFC_PUTQLLUC_CMD:
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{
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if (ch_mfc_args.size != 128)
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{
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break;
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}
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vm::reservation_op(vm::cast(ch_mfc_args.ea, HERE), 128, [this]()
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{
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std::memcpy(vm::base_priv(vm::cast(ch_mfc_args.ea, HERE)), vm::base(offset + ch_mfc_args.lsa), 128);
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@ -512,9 +499,12 @@ u32 SPUThread::get_events(bool waiting)
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}
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// SPU Decrementer Event
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if ((ch_dec_value - (get_timebased_time() - ch_dec_start_timestamp)) >> 31)
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if (!ch_dec_value || (ch_dec_value - (get_timebased_time() - ch_dec_start_timestamp)) >> 31)
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{
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ch_event_stat |= SPU_EVENT_TM;
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if ((ch_event_stat & SPU_EVENT_TM) == 0)
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{
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ch_event_stat |= SPU_EVENT_TM;
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}
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}
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// initialize waiting
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@ -562,7 +552,7 @@ void SPUThread::set_interrupt_status(bool enable)
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if (enable)
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{
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// detect enabling interrupts with events masked
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if (u32 mask = ch_event_mask)
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if (u32 mask = ch_event_mask & ~SPU_EVENT_INTR_IMPLEMENTED)
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{
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fmt::throw_exception("SPU Interrupts not implemented (mask=0x%x)" HERE, mask);
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}
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@ -617,9 +607,11 @@ bool SPUThread::get_ch_value(u32 ch, u32& out)
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switch (ch)
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{
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//case SPU_RdSRR0:
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// value = SRR0;
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// break;
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case SPU_RdSRR0:
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{
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out = srr0;
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break;
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}
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case SPU_RdInMbox:
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{
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while (true)
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@ -738,9 +730,12 @@ bool SPUThread::set_ch_value(u32 ch, u32 value)
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switch (ch)
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{
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//case SPU_WrSRR0:
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// SRR0 = value & 0x3FFFC; //LSLR & ~3
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// break;
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case SPU_WrSRR0:
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{
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srr0 = value;
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break;
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}
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case SPU_WrOutIntrMbox:
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{
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if (offset >= RAW_SPU_BASE_ADDR)
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@ -1013,7 +1008,7 @@ bool SPUThread::set_ch_value(u32 ch, u32 value)
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case SPU_WrEventMask:
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{
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// detect masking events with enabled interrupt status
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if (value && ch_event_stat & SPU_EVENT_INTR_ENABLED)
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if (value & ~SPU_EVENT_INTR_IMPLEMENTED && ch_event_stat & SPU_EVENT_INTR_ENABLED)
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{
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fmt::throw_exception("SPU Interrupts not implemented (mask=0x%x)" HERE, value);
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}
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