diff --git a/rpcs3/Emu/Cell/SPURecompiler.cpp b/rpcs3/Emu/Cell/SPURecompiler.cpp index 48ab1b1ea1..a501e26d1e 100644 --- a/rpcs3/Emu/Cell/SPURecompiler.cpp +++ b/rpcs3/Emu/Cell/SPURecompiler.cpp @@ -7281,7 +7281,7 @@ public: value_t clamp_smax(value_t v) { - return eval(clamp_negative_smax(clamp_positive_smax(v))); + return eval(clamp_positive_smax(clamp_negative_smax(v))); } // FMA favouring zeros @@ -7457,10 +7457,8 @@ public: { const auto a = get_vr(op.ra); const auto b = get_vr(op.rb); - const auto ma = eval(sext(fcmp_uno(a != fsplat(0.)))); - const auto mb = eval(sext(fcmp_uno(b != fsplat(0.)))); - const auto ca = eval(bitcast(bitcast(a) & mb)); - const auto cb = eval(bitcast(bitcast(b) & ma)); + const auto ca = eval(clamp_smax(a)); + const auto cb = eval(clamp_smax(b)); set_vr(op.rt, ca * cb); } else @@ -7527,10 +7525,8 @@ public: value_t fma32x4(value_t a, value_t b, value_t c) { value_t r; - const auto ma = eval(sext(fcmp_uno(a != fsplat(0.)))); - const auto mb = eval(sext(fcmp_uno(b != fsplat(0.)))); - const auto ca = eval(bitcast(bitcast(a) & mb)); - const auto cb = eval(bitcast(bitcast(b) & ma)); + const auto ca = eval(clamp_smax(a)); + const auto cb = eval(clamp_smax(b)); // Optimization: Emit only a floating multiply if the addend is zero // This is odd since SPU code could just use the FM instruction, but it seems common enough