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types.hpp: remove intrinsic includes

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Replace v128 with u128 in some places.
Removed some unused files.
This commit is contained in:
Nekotekina 2020-12-21 17:12:05 +03:00
parent 5f618814f6
commit bd269bccaf
64 changed files with 899 additions and 2265 deletions
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29
rpcs3/Emu/Cell/SPUDisAsm.cpp
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@ -8,6 +8,7 @@ const spu_decoder<spu_itype> s_spu_itype;
const spu_decoder<spu_iflag> s_spu_iflag;
#include "util/v128.hpp"
#include "util/v128sse.hpp"
u32 SPUDisAsm::disasm(u32 pc)
{
@ -161,7 +162,7 @@ std::pair<bool, v128> SPUDisAsm::try_get_const_value(u32 reg, u32 pc) const
return {};
}
typename SPUDisAsm::insert_mask_info SPUDisAsm::try_get_insert_mask_info(v128 mask)
typename SPUDisAsm::insert_mask_info SPUDisAsm::try_get_insert_mask_info(const v128& mask)
{
if ((mask & v128::from8p(0xe0)) != v128{})
{
@ -302,3 +303,29 @@ void SPUDisAsm::IOHL(spu_opcode_t op)
DisAsm("iohl", spu_reg_name[op.rt], op.i16);
}
void SPUDisAsm::SHUFB(spu_opcode_t op)
{
const auto [is_const, value] = try_get_const_value(op.rc);
if (is_const)
{
const auto [size, dst, src] = try_get_insert_mask_info(value);
if (size)
{
if ((size >= 4u && !src) || (size == 2u && src == 1u) || (size == 1u && src == 3u))
{
// Comment insertion pattern for CWD-alike instruction
DisAsm("shufb", spu_reg_name[op.rt4], spu_reg_name[op.ra], spu_reg_name[op.rb], fmt::format("%s #i%u[%u]", spu_reg_name[op.rc], size * 8, dst).c_str());
return;
}
// Comment insertion pattern for unknown instruction formations
DisAsm("shufb", spu_reg_name[op.rt4], spu_reg_name[op.ra], spu_reg_name[op.rb], fmt::format("%s #i%u[%u] = [%u]", spu_reg_name[op.rc], size * 8, dst, src).c_str());
return;
}
}
DisAsm("shufb", spu_reg_name[op.rt4], spu_reg_name[op.ra], spu_reg_name[op.rb], spu_reg_name[op.rc]);
}