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SPU Debugger: Implement float registers view + General debugger fixes (#9265)
* SPU Debugger: Fix try_get_insert_mask_info * Debugger: Always update thread state on context's data change No longer needing to press on thread's instructions for actions to work!
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7 changed files with 67 additions and 22 deletions
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@ -1194,9 +1194,11 @@ std::string spu_thread::dump_regs() const
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{
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std::string ret;
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const bool floats_only = debugger_float_mode.load();
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for (u32 i = 0; i < 128; i++, ret += '\n')
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{
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fmt::append(ret, "r%d: ", i);
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fmt::append(ret, "%s: ", spu_reg_name[i]);
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const auto r = gpr[i];
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@ -1217,9 +1219,25 @@ std::string spu_thread::dump_regs() const
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}
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}
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const u32 i3 = r._u32[3];
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auto to_f64 = [](u32 bits)
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{
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const u32 abs = bits & 0x7fff'ffff;
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constexpr u32 scale = (1 << 23);
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return std::copysign(abs < scale ? 0 : std::ldexp((scale + (abs % scale)) / f64{scale}, static_cast<int>(abs >> 23) - 127), bits >> 31 ? -1 : 1);
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};
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if (v128::from32p(i3) == r)
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const double array[]{to_f64(r.u32r[0]), to_f64(r.u32r[1]), to_f64(r.u32r[2]), to_f64(r.u32r[3])};
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const u32 i3 = r._u32[3];
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const bool is_packed = v128::from32p(i3) == r;
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if (floats_only)
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{
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fmt::append(ret, "%g, %g, %g, %g", array[0], array[1], array[2], array[3]);
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continue;
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}
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if (is_packed)
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{
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// Shortand formatting
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fmt::append(ret, "%08x", i3);
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@ -1229,8 +1247,6 @@ std::string spu_thread::dump_regs() const
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fmt::append(ret, "%08x %08x %08x %08x", r.u32r[0], r.u32r[1], r.u32r[2], r.u32r[3]);
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}
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// TODO: SPU floats fomatting
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if (i3 >= 0x80 && is_exec_code(i3))
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{
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SPUDisAsm dis_asm(CPUDisAsm_NormalMode);
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@ -1239,6 +1255,18 @@ std::string spu_thread::dump_regs() const
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dis_asm.disasm(i3);
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fmt::append(ret, " -> %s", dis_asm.last_opcode);
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}
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if (std::any_of(std::begin(array), std::end(array), [](f64 v){ return v != 0; }))
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{
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if (is_packed)
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{
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fmt::append(ret, " (%g)", array[0]);
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}
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else
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{
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fmt::append(ret, " (%g, %g, %g, %g)", array[0], array[1], array[2], array[3]);
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}
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}
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}
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const auto events = ch_events.load();
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