From b138d25b97edd0b6d1c81049f6c401fd11abdc20 Mon Sep 17 00:00:00 2001
From: Nekotekina <nekotekina@gmail.com>
Date: Thu, 16 May 2019 00:53:37 +0300
Subject: [PATCH] SPU Disasm: fix absolute addressing in some instructions.

STQA, LQA, BRA, BRASL instructions.
---
 rpcs3/Emu/Cell/SPUDisAsm.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/rpcs3/Emu/Cell/SPUDisAsm.h b/rpcs3/Emu/Cell/SPUDisAsm.h
index 4a417dbbd7..001c5a4ffa 100644
--- a/rpcs3/Emu/Cell/SPUDisAsm.h
+++ b/rpcs3/Emu/Cell/SPUDisAsm.h
@@ -724,7 +724,7 @@ public:
 	}
 	void STQA(spu_opcode_t op)
 	{
-		DisAsm("stqa", spu_reg_name[op.rt], DisAsmBranchTarget(op.i16));
+		DisAsm("stqa", spu_reg_name[op.rt], DisAsmBranchTarget(op.i16 - dump_pc / 4));
 	}
 	void BRNZ(spu_opcode_t op)
 	{
@@ -744,15 +744,15 @@ public:
 	}
 	void BRA(spu_opcode_t op)
 	{
-		DisAsm("bra", DisAsmBranchTarget(op.i16));
+		DisAsm("bra", DisAsmBranchTarget(op.i16 - dump_pc / 4));
 	}
 	void LQA(spu_opcode_t op)
 	{
-		DisAsm("lqa", spu_reg_name[op.rt], DisAsmBranchTarget(op.i16));
+		DisAsm("lqa", spu_reg_name[op.rt], DisAsmBranchTarget(op.i16 - dump_pc / 4));
 	}
 	void BRASL(spu_opcode_t op)
 	{
-		DisAsm("brasl", spu_reg_name[op.rt], DisAsmBranchTarget(op.i16));
+		DisAsm("brasl", spu_reg_name[op.rt], DisAsmBranchTarget(op.i16 - dump_pc / 4));
 	}
 	void BR(spu_opcode_t op)
 	{
@@ -908,7 +908,7 @@ public:
 	//0 - 6
 	void HBRA(spu_opcode_t op)
 	{
-		DisAsm("hbra", DisAsmBranchTarget((op.r0h << 7) | op.rt), DisAsmBranchTarget(op.i16));
+		DisAsm("hbra", DisAsmBranchTarget((op.r0h << 7) | op.rt), DisAsmBranchTarget(op.i16 - dump_pc / 4));
 	}
 	void HBRR(spu_opcode_t op)
 	{