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PPU Disasm: Fix RC OE enabled instructions view
This commit is contained in:
parent
8d1505752f
commit
af0bd7136d
1 changed files with 15 additions and 15 deletions
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@ -63,7 +63,7 @@ private:
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}
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void DisAsm_CR1_F2_RC(const std::string& op, u32 cr0, u32 f0, u32 f1, u32 rc)
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{
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Write(fmt::format("%s%s cr%d,f%d,f%d", FixOp(op).c_str(), (rc ? "." : ""), cr0, f0, f1));
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Write(fmt::format("%s cr%d,f%d,f%d", FixOp(op + (rc ? "." : "")).c_str(), cr0, f0, f1));
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}
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void DisAsm_CR1_F2(const std::string& op, u32 cr0, u32 f0, u32 f1)
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{
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@ -79,7 +79,7 @@ private:
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}
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void DisAsm_INT1_R1_RC(const std::string& op, u32 i0, u32 r0, u32 rc)
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{
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Write(fmt::format("%s%s %d,r%d", FixOp(op).c_str(), (rc ? "." : ""), i0, r0));
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Write(fmt::format("%s %d,r%d", FixOp(op + (rc ? "." : "")).c_str(), i0, r0));
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}
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void DisAsm_INT1_R1(const std::string& op, u32 i0, u32 r0)
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{
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@ -87,11 +87,11 @@ private:
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}
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void DisAsm_F4_RC(const std::string& op, u32 f0, u32 f1, u32 f2, u32 f3, u32 rc)
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{
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Write(fmt::format("%s%s f%d,f%d,f%d,f%d", FixOp(op).c_str(), (rc ? "." : ""), f0, f1, f2, f3));
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Write(fmt::format("%s f%d,f%d,f%d,f%d", FixOp(op + (rc ? "." : "")).c_str(), f0, f1, f2, f3));
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}
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void DisAsm_F3_RC(const std::string& op, u32 f0, u32 f1, u32 f2, u32 rc)
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{
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Write(fmt::format("%s%s f%d,f%d,f%d", FixOp(op).c_str(), (rc ? "." : ""), f0, f1, f2));
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Write(fmt::format("%s f%d,f%d,f%d", FixOp(op + (rc ? "." : "")).c_str(), f0, f1, f2));
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}
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void DisAsm_F3(const std::string& op, u32 f0, u32 f1, u32 f2)
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{
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@ -99,7 +99,7 @@ private:
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}
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void DisAsm_F2_RC(const std::string& op, u32 f0, u32 f1, u32 rc)
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{
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Write(fmt::format("%s%s f%d,f%d", FixOp(op).c_str(), (rc ? "." : ""), f0, f1));
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Write(fmt::format("%s f%d,f%d", FixOp(op + (rc ? "." : "")).c_str(), f0, f1));
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}
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void DisAsm_F2(const std::string& op, u32 f0, u32 f1)
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{
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@ -119,11 +119,11 @@ private:
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{
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if(m_mode == CPUDisAsm_CompilerElfMode)
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{
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Write(fmt::format("%s%s f%d,r%d,%d #%x", FixOp(op).c_str(), (rc ? "." : ""), f0, r0, imm0, imm0));
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Write(fmt::format("%s f%d,r%d,%d #%x", FixOp(op + (rc ? "." : "")).c_str(), f0, r0, imm0, imm0));
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return;
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}
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Write(fmt::format("%s%s f%d,%d(r%d) #%x", FixOp(op).c_str(), (rc ? "." : ""), f0, imm0, r0, imm0));
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Write(fmt::format("%s f%d,%d(r%d) #%x", FixOp(op + (rc ? "." : "")).c_str(), f0, imm0, r0, imm0));
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}
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void DisAsm_F1_IMM_R1(const std::string& op, u32 f0, s32 imm0, u32 r0)
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{
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@ -131,11 +131,11 @@ private:
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}
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void DisAsm_F1_RC(const std::string& op, u32 f0, u32 rc)
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{
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Write(fmt::format("%s%s f%d", FixOp(op).c_str(), (rc ? "." : ""), f0));
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Write(fmt::format("%s f%d", FixOp(op + (rc ? "." : "")).c_str(), f0));
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}
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void DisAsm_R1_RC(const std::string& op, u32 r0, u32 rc)
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{
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Write(fmt::format("%s%s r%d", FixOp(op).c_str(), (rc ? "." : ""), r0));
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Write(fmt::format("%s r%d", FixOp(op + (rc ? "." : "")).c_str(), r0));
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}
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void DisAsm_R1(const std::string& op, u32 r0)
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{
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@ -143,7 +143,7 @@ private:
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}
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void DisAsm_R2_OE_RC(const std::string& op, u32 r0, u32 r1, u32 _oe, u32 rc)
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{
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Write(fmt::format("%s%s%s r%d,r%d", FixOp(op).c_str(), (_oe ? "o" : ""), (rc ? "." : ""), r0, r1));
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Write(fmt::format("%s r%d,r%d", FixOp(op + (_oe ? "o" : "") + (rc ? "." : "")).c_str(), r0, r1));
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}
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void DisAsm_R2_RC(const std::string& op, u32 r0, u32 r1, u32 rc)
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{
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@ -155,11 +155,11 @@ private:
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}
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void DisAsm_R3_OE_RC(const std::string& op, u32 r0, u32 r1, u32 r2, u32 _oe, u32 rc)
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{
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Write(fmt::format("%s%s%s r%d,r%d,r%d", FixOp(op).c_str(), (_oe ? "o" : ""), (rc ? "." : ""), r0, r1, r2));
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Write(fmt::format("%s r%d,r%d,r%d", FixOp(op + (rc ? "." : "") + (_oe ? "o" : "")).c_str(), r0, r1, r2));
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}
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void DisAsm_R3_INT2_RC(const std::string& op, u32 r0, u32 r1, u32 r2, s32 i0, s32 i1, u32 rc)
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{
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Write(fmt::format("%s%s r%d,r%d,r%d,%d,%d", FixOp(op).c_str(), (rc ? "." : ""), r0, r1, r2, i0, i1));
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Write(fmt::format("%s r%d,r%d,r%d,%d,%d", FixOp(op + (rc ? "." : "")).c_str(), r0, r1, r2, i0, i1));
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}
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void DisAsm_R3_RC(const std::string& op, u32 r0, u32 r1, u32 r2, u32 rc)
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{
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@ -171,7 +171,7 @@ private:
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}
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void DisAsm_R2_INT3_RC(const std::string& op, u32 r0, u32 r1, s32 i0, s32 i1, s32 i2, u32 rc)
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{
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Write(fmt::format("%s%s r%d,r%d,%d,%d,%d", FixOp(op).c_str(), (rc ? "." : ""), r0, r1, i0, i1, i2));
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Write(fmt::format("%s r%d,r%d,%d,%d,%d", FixOp(op + (rc ? "." : "")).c_str(), r0, r1, i0, i1, i2));
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}
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void DisAsm_R2_INT3(const std::string& op, u32 r0, u32 r1, s32 i0, s32 i1, s32 i2)
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{
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@ -179,7 +179,7 @@ private:
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}
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void DisAsm_R2_INT2_RC(const std::string& op, u32 r0, u32 r1, s32 i0, s32 i1, u32 rc)
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{
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Write(fmt::format("%s%s r%d,r%d,%d,%d", FixOp(op).c_str(), (rc ? "." : ""), r0, r1, i0, i1));
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Write(fmt::format("%s r%d,r%d,%d,%d", FixOp(op + (rc ? "." : "")).c_str(), r0, r1, i0, i1));
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}
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void DisAsm_R2_INT2(const std::string& op, u32 r0, u32 r1, s32 i0, s32 i1)
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{
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@ -187,7 +187,7 @@ private:
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}
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void DisAsm_R2_INT1_RC(const std::string& op, u32 r0, u32 r1, s32 i0, u32 rc)
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{
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Write(fmt::format("%s%s r%d,r%d,%d", FixOp(op).c_str(), (rc ? "." : ""), r0, r1, i0));
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Write(fmt::format("%s r%d,r%d,%d", FixOp(op + (rc ? "." : "")).c_str(), r0, r1, i0));
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}
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void DisAsm_R2_INT1(const std::string& op, u32 r0, u32 r1, s32 i0)
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{
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