mirror of
https://github.com/RPCS3/rpcs3.git
synced 2025-07-09 00:11:24 +12:00
vm::var improved, cleanup
Mostly vm::var initialization introduced. Added vm::make_var function.
This commit is contained in:
Nekotekina
parent
cc02a147d3
commit
a974ee009e
116 changed files with 2763 additions and 3019 deletions
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@ -223,10 +223,7 @@ spu_recompiler::XmmLink spu_recompiler::XmmAlloc() // get empty xmm register
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{
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for (auto& v : vec)
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{
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if (v)
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{
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return XmmLink{ v };
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}
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if (v) return{ v };
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}
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throw EXCEPTION("Out of Xmm Vars");
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@ -699,7 +696,7 @@ void spu_recompiler::SHLH(spu_opcode_t op)
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void spu_recompiler::ROTI(spu_opcode_t op)
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{
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// rotate left
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const int s = op.si7 & 0x1f;
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const int s = op.i7 & 0x1f;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& v1 = XmmAlloc();
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c->movdqa(v1, va);
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@ -712,7 +709,7 @@ void spu_recompiler::ROTI(spu_opcode_t op)
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void spu_recompiler::ROTMI(spu_opcode_t op)
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{
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// shift right logical
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const int s = (0 - op.si7) & 0x3f;
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const int s = 0-op.i7 & 0x3f;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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c->psrld(va, s);
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c->movdqa(SPU_OFF_128(gpr[op.rt]), va);
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@ -721,7 +718,7 @@ void spu_recompiler::ROTMI(spu_opcode_t op)
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void spu_recompiler::ROTMAI(spu_opcode_t op)
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{
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// shift right arithmetical
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const int s = (0 - op.si7) & 0x3f;
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const int s = 0-op.i7 & 0x3f;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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c->psrad(va, s);
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c->movdqa(SPU_OFF_128(gpr[op.rt]), va);
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@ -730,7 +727,7 @@ void spu_recompiler::ROTMAI(spu_opcode_t op)
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void spu_recompiler::SHLI(spu_opcode_t op)
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{
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// shift left
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const int s = op.si7 & 0x3f;
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const int s = op.i7 & 0x3f;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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c->pslld(va, s);
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c->movdqa(SPU_OFF_128(gpr[op.rt]), va);
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@ -739,7 +736,7 @@ void spu_recompiler::SHLI(spu_opcode_t op)
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void spu_recompiler::ROTHI(spu_opcode_t op)
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{
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// rotate left (halfword)
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const int s = op.si7 & 0xf;
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const int s = op.i7 & 0xf;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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const XmmLink& v1 = XmmAlloc();
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c->movdqa(v1, va);
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@ -752,7 +749,7 @@ void spu_recompiler::ROTHI(spu_opcode_t op)
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void spu_recompiler::ROTHMI(spu_opcode_t op)
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{
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// shift right logical
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const int s = (0 - op.si7) & 0x1f;
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const int s = 0-op.i7 & 0x1f;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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c->psrlw(va, s);
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c->movdqa(SPU_OFF_128(gpr[op.rt]), va);
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@ -761,7 +758,7 @@ void spu_recompiler::ROTHMI(spu_opcode_t op)
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void spu_recompiler::ROTMAHI(spu_opcode_t op)
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{
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// shift right arithmetical (halfword)
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const int s = (0 - op.si7) & 0x1f;
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const int s = 0-op.i7 & 0x1f;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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c->psraw(va, s);
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c->movdqa(SPU_OFF_128(gpr[op.rt]), va);
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@ -770,7 +767,7 @@ void spu_recompiler::ROTMAHI(spu_opcode_t op)
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void spu_recompiler::SHLHI(spu_opcode_t op)
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{
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// shift left (halfword)
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const int s = op.si7 & 0x1f;
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const int s = op.i7 & 0x1f;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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c->psllw(va, s);
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c->movdqa(SPU_OFF_128(gpr[op.rt]), va);
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@ -914,7 +911,7 @@ void spu_recompiler::BISL(spu_opcode_t op)
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const XmmLink& vr = XmmAlloc();
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c->movdqa(vr, XmmConst(_mm_set_epi32(spu_branch_target(m_pos + 4), 0, 0, 0)));
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c->movdqa(SPU_OFF_128(gpr[op.rt]), vr);
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c->unuse(*vr.m_var);
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c->unuse(vr);
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FunctionCall();
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}
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@ -1243,14 +1240,14 @@ void spu_recompiler::CBD(spu_opcode_t op)
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// // assuming that SP % 16 is always zero
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// const XmmLink& vr = XmmAlloc();
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// v128 value = v128::fromV(_mm_set_epi32(0x10111213, 0x14151617, 0x18191a1b, 0x1c1d1e1f));
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// value.u8r[op.si7 & 0xf] = 0x03;
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// value.u8r[op.i7 & 0xf] = 0x03;
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// c->movdqa(vr, XmmConst(value));
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// c->movdqa(SPU_OFF_128(gpr[op.rt]), vr);
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// return;
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//}
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c->mov(*addr, SPU_OFF_32(gpr[op.ra]._u32[3]));
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if (op.si7) c->add(*addr, op.si7);
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if (op.i7) c->add(*addr, op.i7);
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c->not_(*addr);
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c->and_(*addr, 0xf);
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@ -1268,14 +1265,14 @@ void spu_recompiler::CHD(spu_opcode_t op)
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// // assuming that SP % 16 is always zero
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// const XmmLink& vr = XmmAlloc();
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// v128 value = v128::fromV(_mm_set_epi32(0x10111213, 0x14151617, 0x18191a1b, 0x1c1d1e1f));
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// value.u16r[(op.si7 >> 1) & 0x7] = 0x0203;
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// value.u16r[(op.i7 >> 1) & 0x7] = 0x0203;
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// c->movdqa(vr, XmmConst(value));
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// c->movdqa(SPU_OFF_128(gpr[op.rt]), vr);
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// return;
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//}
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c->mov(*addr, SPU_OFF_32(gpr[op.ra]._u32[3]));
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if (op.si7) c->add(*addr, op.si7);
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if (op.i7) c->add(*addr, op.i7);
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c->not_(*addr);
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c->and_(*addr, 0xe);
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@ -1293,14 +1290,14 @@ void spu_recompiler::CWD(spu_opcode_t op)
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// // assuming that SP % 16 is always zero
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// const XmmLink& vr = XmmAlloc();
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// v128 value = v128::fromV(_mm_set_epi32(0x10111213, 0x14151617, 0x18191a1b, 0x1c1d1e1f));
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// value.u32r[(op.si7 >> 2) & 0x3] = 0x00010203;
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// value.u32r[(op.i7 >> 2) & 0x3] = 0x00010203;
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// c->movdqa(vr, XmmConst(value));
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// c->movdqa(SPU_OFF_128(gpr[op.rt]), vr);
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// return;
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//}
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c->mov(*addr, SPU_OFF_32(gpr[op.ra]._u32[3]));
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if (op.si7) c->add(*addr, op.si7);
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if (op.i7) c->add(*addr, op.i7);
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c->not_(*addr);
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c->and_(*addr, 0xc);
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@ -1318,14 +1315,14 @@ void spu_recompiler::CDD(spu_opcode_t op)
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// // assuming that SP % 16 is always zero
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// const XmmLink& vr = XmmAlloc();
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// v128 value = v128::fromV(_mm_set_epi32(0x10111213, 0x14151617, 0x18191a1b, 0x1c1d1e1f));
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// value.u64r[(op.si7 >> 3) & 0x1] = 0x0001020304050607ull;
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// value.u64r[(op.i7 >> 3) & 0x1] = 0x0001020304050607ull;
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// c->movdqa(vr, XmmConst(value));
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// c->movdqa(SPU_OFF_128(gpr[op.rt]), vr);
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// return;
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//}
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c->mov(*addr, SPU_OFF_32(gpr[op.ra]._u32[3]));
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if (op.si7) c->add(*addr, op.si7);
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if (op.i7) c->add(*addr, op.i7);
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c->not_(*addr);
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c->and_(*addr, 0x8);
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@ -1343,8 +1340,8 @@ void spu_recompiler::ROTQBII(spu_opcode_t op)
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c->mov(*qw0, SPU_OFF_64(gpr[op.ra]._u64[0]));
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c->mov(*qw1, SPU_OFF_64(gpr[op.ra]._u64[1]));
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c->mov(*qw2, *qw0);
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c->shld(*qw0, *qw1, op.si7 & 0x7);
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c->shld(*qw1, *qw2, op.si7 & 0x7);
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c->shld(*qw0, *qw1, op.i7 & 0x7);
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c->shld(*qw1, *qw2, op.i7 & 0x7);
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c->mov(SPU_OFF_64(gpr[op.rt]._u64[0]), *qw0);
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c->mov(SPU_OFF_64(gpr[op.rt]._u64[1]), *qw1);
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c->unuse(*qw0);
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@ -1356,8 +1353,8 @@ void spu_recompiler::ROTQMBII(spu_opcode_t op)
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{
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c->mov(*qw0, SPU_OFF_64(gpr[op.ra]._u64[0]));
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c->mov(*qw1, SPU_OFF_64(gpr[op.ra]._u64[1]));
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c->shrd(*qw0, *qw1, (0 - op.si7) & 0x7);
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c->shr(*qw1, (0 - op.si7) & 0x7);
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c->shrd(*qw0, *qw1, 0-op.i7 & 0x7);
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c->shr(*qw1, 0-op.i7 & 0x7);
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c->mov(SPU_OFF_64(gpr[op.rt]._u64[0]), *qw0);
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c->mov(SPU_OFF_64(gpr[op.rt]._u64[1]), *qw1);
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c->unuse(*qw0);
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@ -1368,8 +1365,8 @@ void spu_recompiler::SHLQBII(spu_opcode_t op)
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{
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c->mov(*qw0, SPU_OFF_64(gpr[op.ra]._u64[0]));
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c->mov(*qw1, SPU_OFF_64(gpr[op.ra]._u64[1]));
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c->shld(*qw1, *qw0, op.si7 & 0x7);
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c->shl(*qw0, op.si7 & 0x7);
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c->shld(*qw1, *qw0, op.i7 & 0x7);
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c->shl(*qw0, op.i7 & 0x7);
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c->mov(SPU_OFF_64(gpr[op.rt]._u64[0]), *qw0);
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c->mov(SPU_OFF_64(gpr[op.rt]._u64[1]), *qw1);
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c->unuse(*qw0);
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@ -1378,7 +1375,7 @@ void spu_recompiler::SHLQBII(spu_opcode_t op)
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void spu_recompiler::ROTQBYI(spu_opcode_t op)
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{
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const int s = op.si7 & 0xf;
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const int s = op.i7 & 0xf;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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c->palignr(va, va, 16 - s);
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c->movdqa(SPU_OFF_128(gpr[op.rt]), va);
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@ -1386,7 +1383,7 @@ void spu_recompiler::ROTQBYI(spu_opcode_t op)
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void spu_recompiler::ROTQMBYI(spu_opcode_t op)
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{
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const int s = (0 - op.si7) & 0x1f;
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const int s = 0-op.i7 & 0x1f;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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c->psrldq(va, s);
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c->movdqa(SPU_OFF_128(gpr[op.rt]), va);
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@ -1394,7 +1391,7 @@ void spu_recompiler::ROTQMBYI(spu_opcode_t op)
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void spu_recompiler::SHLQBYI(spu_opcode_t op)
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{
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const int s = op.si7 & 0x1f;
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const int s = op.i7 & 0x1f;
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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c->pslldq(va, s);
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c->movdqa(SPU_OFF_128(gpr[op.rt]), va);
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@ -1968,7 +1965,7 @@ void spu_recompiler::CFLTS(spu_opcode_t op)
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{
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const XmmLink& va = XmmGet(op.ra, XmmType::Float);
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const XmmLink& vi = XmmAlloc();
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if (op.si8 != 173) c->mulps(va, XmmConst(_mm_set1_ps(exp2f(static_cast<float>(173 - (op.si8 & 0xff)))))); // scale
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if (op.i8 != 173) c->mulps(va, XmmConst(_mm_set1_ps(exp2f(static_cast<s16>(173 - op.i8))))); // scale
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c->movaps(vi, XmmConst(_mm_set1_ps(exp2f(31))));
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c->cmpps(vi, va, 2);
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c->cvttps2dq(va, va); // convert to ints with truncation
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@ -1982,7 +1979,7 @@ void spu_recompiler::CFLTU(spu_opcode_t op)
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const XmmLink& vs = XmmAlloc();
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const XmmLink& vs2 = XmmAlloc();
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const XmmLink& vs3 = XmmAlloc();
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if (op.si8 != 173) c->mulps(va, XmmConst(_mm_set1_ps(exp2f(static_cast<float>(173 - (op.si8 & 0xff)))))); // scale
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if (op.i8 != 173) c->mulps(va, XmmConst(_mm_set1_ps(exp2f(static_cast<s16>(173 - op.i8))))); // scale
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c->maxps(va, XmmConst(_mm_set1_ps(0.0f))); // saturate
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c->movaps(vs, va); // copy scaled value
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c->movaps(vs2, va);
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@ -2002,7 +1999,7 @@ void spu_recompiler::CSFLT(spu_opcode_t op)
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{
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const XmmLink& va = XmmGet(op.ra, XmmType::Int);
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c->cvtdq2ps(va, va); // convert to floats
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if (op.si8 != 155) c->mulps(va, XmmConst(_mm_set1_ps(exp2f(static_cast<float>((op.si8 & 0xff) - 155))))); // scale
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if (op.i8 != 155) c->mulps(va, XmmConst(_mm_set1_ps(exp2f(static_cast<s16>(op.i8 - 155))))); // scale
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c->movaps(SPU_OFF_128(gpr[op.rt]), va);
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}
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@ -2016,13 +2013,15 @@ void spu_recompiler::CUFLT(spu_opcode_t op)
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c->psrad(v1, 31); // generate mask from sign bit
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c->andps(v1, XmmConst(_mm_set1_ps(exp2f(31)))); // generate correction component
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c->addps(va, v1); // add correction component
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if (op.si8 != 155) c->mulps(va, XmmConst(_mm_set1_ps(exp2f(static_cast<float>((op.si8 & 0xff) - 155))))); // scale
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if (op.i8 != 155) c->mulps(va, XmmConst(_mm_set1_ps(exp2f(static_cast<s16>(op.i8 - 155))))); // scale
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c->movaps(SPU_OFF_128(gpr[op.rt]), va);
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}
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void spu_recompiler::BRZ(spu_opcode_t op)
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{
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const u32 target = spu_branch_target(m_pos, op.si16);
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const u32 target = spu_branch_target(m_pos, op.i16);
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if (target == m_pos) throw EXCEPTION("Branch-to-self (0x%05x)", target);
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c->cmp(SPU_OFF_32(gpr[op.rt]._u32[3]), 0);
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@ -2045,16 +2044,16 @@ void spu_recompiler::BRZ(spu_opcode_t op)
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void spu_recompiler::STQA(spu_opcode_t op)
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{
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const u32 lsa = (op.si16 << 2) & 0x3fff0;
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const XmmLink& vt = XmmGet(op.rt, XmmType::Int);
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c->pshufb(vt, XmmConst(_mm_set_epi32(0x00010203, 0x04050607, 0x08090a0b, 0x0c0d0e0f)));
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c->movdqa(asmjit::host::oword_ptr(*ls, lsa), vt);
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c->movdqa(asmjit::host::oword_ptr(*ls, spu_ls_target(0, op.i16)), vt);
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}
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void spu_recompiler::BRNZ(spu_opcode_t op)
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{
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const u32 target = spu_branch_target(m_pos, op.si16);
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const u32 target = spu_branch_target(m_pos, op.i16);
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if (target == m_pos) throw EXCEPTION("Branch-to-self (0x%05x)", target);
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c->cmp(SPU_OFF_32(gpr[op.rt]._u32[3]), 0);
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@ -2077,7 +2076,9 @@ void spu_recompiler::BRNZ(spu_opcode_t op)
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void spu_recompiler::BRHZ(spu_opcode_t op)
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{
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const u32 target = spu_branch_target(m_pos, op.si16);
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const u32 target = spu_branch_target(m_pos, op.i16);
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if (target == m_pos) throw EXCEPTION("Branch-to-self (0x%05x)", target);
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c->cmp(SPU_OFF_16(gpr[op.rt]._u16[6]), 0);
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@ -2100,7 +2101,9 @@ void spu_recompiler::BRHZ(spu_opcode_t op)
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void spu_recompiler::BRHNZ(spu_opcode_t op)
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{
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const u32 target = spu_branch_target(m_pos, op.si16);
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const u32 target = spu_branch_target(m_pos, op.i16);
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if (target == m_pos) throw EXCEPTION("Branch-to-self (0x%05x)", target);
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c->cmp(SPU_OFF_16(gpr[op.rt]._u16[6]), 0);
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@ -2123,16 +2126,16 @@ void spu_recompiler::BRHNZ(spu_opcode_t op)
|
|||
|
||||
void spu_recompiler::STQR(spu_opcode_t op)
|
||||
{
|
||||
const u32 lsa = spu_branch_target(m_pos, op.si16) & 0x3fff0;
|
||||
|
||||
const XmmLink& vt = XmmGet(op.rt, XmmType::Int);
|
||||
c->pshufb(vt, XmmConst(_mm_set_epi32(0x00010203, 0x04050607, 0x08090a0b, 0x0c0d0e0f)));
|
||||
c->movdqa(asmjit::host::oword_ptr(*ls, lsa), vt);
|
||||
c->movdqa(asmjit::host::oword_ptr(*ls, spu_ls_target(m_pos, op.i16)), vt);
|
||||
}
|
||||
|
||||
void spu_recompiler::BRA(spu_opcode_t op)
|
||||
{
|
||||
const u32 target = spu_branch_target(0, op.si16);
|
||||
const u32 target = spu_branch_target(0, op.i16);
|
||||
|
||||
if (target == m_pos) throw EXCEPTION("Branch-to-self (0x%05x)", target);
|
||||
|
||||
if (labels[target / 4].isInitialized())
|
||||
{
|
||||
|
|
@ -2153,22 +2156,22 @@ void spu_recompiler::BRA(spu_opcode_t op)
|
|||
|
||||
void spu_recompiler::LQA(spu_opcode_t op)
|
||||
{
|
||||
const u32 lsa = (op.si16 << 2) & 0x3fff0;
|
||||
|
||||
const XmmLink& vt = XmmAlloc();
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||||
c->movdqa(vt, asmjit::host::oword_ptr(*ls, lsa));
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||||
c->movdqa(vt, asmjit::host::oword_ptr(*ls, spu_ls_target(0, op.i16)));
|
||||
c->pshufb(vt, XmmConst(_mm_set_epi32(0x00010203, 0x04050607, 0x08090a0b, 0x0c0d0e0f)));
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rt]), vt);
|
||||
}
|
||||
|
||||
void spu_recompiler::BRASL(spu_opcode_t op)
|
||||
{
|
||||
const u32 target = spu_branch_target(0, op.si16);
|
||||
const u32 target = spu_branch_target(0, op.i16);
|
||||
|
||||
if (target == m_pos) throw EXCEPTION("Branch-to-self (0x%05x)", target);
|
||||
|
||||
const XmmLink& vr = XmmAlloc();
|
||||
c->movdqa(vr, XmmConst(_mm_set_epi32(spu_branch_target(m_pos + 4), 0, 0, 0)));
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rt]), vr);
|
||||
c->unuse(*vr.m_var);
|
||||
c->unuse(vr);
|
||||
|
||||
c->mov(SPU_OFF_32(pc), target);
|
||||
|
||||
|
|
@ -2177,7 +2180,18 @@ void spu_recompiler::BRASL(spu_opcode_t op)
|
|||
|
||||
void spu_recompiler::BR(spu_opcode_t op)
|
||||
{
|
||||
const u32 target = spu_branch_target(m_pos, op.si16);
|
||||
const u32 target = spu_branch_target(m_pos, op.i16);
|
||||
|
||||
if (target == m_pos)
|
||||
{
|
||||
c->mov(*addr, target | 0x2000000);
|
||||
//c->cmp(asmjit::host::dword_ptr(*ls, m_pos), 0x32); // compare instruction opcode with BR-to-self
|
||||
//c->je(labels[target / 4]);
|
||||
c->lock().or_(SPU_OFF_64(m_state), CPU_STATE_RETURN | CPU_STATE_STOPPED);
|
||||
c->jmp(*end);
|
||||
c->unuse(*addr);
|
||||
return;
|
||||
}
|
||||
|
||||
if (labels[target / 4].isInitialized())
|
||||
{
|
||||
|
|
@ -2199,18 +2213,20 @@ void spu_recompiler::BR(spu_opcode_t op)
|
|||
void spu_recompiler::FSMBI(spu_opcode_t op)
|
||||
{
|
||||
const XmmLink& vr = XmmAlloc();
|
||||
c->movdqa(vr, XmmConst(g_spu_imm.fsmb[op.si16 & 0xffff]));
|
||||
c->movdqa(vr, XmmConst(g_spu_imm.fsmb[op.i16]));
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rt]), vr);
|
||||
}
|
||||
|
||||
void spu_recompiler::BRSL(spu_opcode_t op)
|
||||
{
|
||||
const u32 target = spu_branch_target(m_pos, op.si16);
|
||||
const u32 target = spu_branch_target(m_pos, op.i16);
|
||||
|
||||
if (target == m_pos) throw EXCEPTION("Branch-to-self (0x%05x)", target);
|
||||
|
||||
const XmmLink& vr = XmmAlloc();
|
||||
c->movdqa(vr, XmmConst(_mm_set_epi32(spu_branch_target(m_pos + 4), 0, 0, 0)));
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rt]), vr);
|
||||
c->unuse(*vr.m_var);
|
||||
c->unuse(vr);
|
||||
|
||||
if (target == spu_branch_target(m_pos + 4))
|
||||
{
|
||||
|
|
@ -2225,10 +2241,8 @@ void spu_recompiler::BRSL(spu_opcode_t op)
|
|||
|
||||
void spu_recompiler::LQR(spu_opcode_t op)
|
||||
{
|
||||
const u32 lsa = spu_branch_target(m_pos, op.si16) & 0x3fff0;
|
||||
|
||||
const XmmLink& vt = XmmAlloc();
|
||||
c->movdqa(vt, asmjit::host::oword_ptr(*ls, lsa));
|
||||
c->movdqa(vt, asmjit::host::oword_ptr(*ls, spu_ls_target(m_pos, op.i16)));
|
||||
c->pshufb(vt, XmmConst(_mm_set_epi32(0x00010203, 0x04050607, 0x08090a0b, 0x0c0d0e0f)));
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rt]), vt);
|
||||
}
|
||||
|
|
@ -2243,14 +2257,14 @@ void spu_recompiler::IL(spu_opcode_t op)
|
|||
void spu_recompiler::ILHU(spu_opcode_t op)
|
||||
{
|
||||
const XmmLink& vr = XmmAlloc();
|
||||
c->movdqa(vr, XmmConst(_mm_set1_epi32(op.si16 << 16)));
|
||||
c->movdqa(vr, XmmConst(_mm_set1_epi32(op.i16 << 16)));
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rt]), vr);
|
||||
}
|
||||
|
||||
void spu_recompiler::ILH(spu_opcode_t op)
|
||||
{
|
||||
const XmmLink& vr = XmmAlloc();
|
||||
c->movdqa(vr, XmmConst(_mm_set1_epi16(op.si16)));
|
||||
c->movdqa(vr, XmmConst(_mm_set1_epi16(op.i16)));
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rt]), vr);
|
||||
}
|
||||
|
||||
|
|
@ -2516,16 +2530,16 @@ void spu_recompiler::ILA(spu_opcode_t op)
|
|||
void spu_recompiler::SELB(spu_opcode_t op)
|
||||
{
|
||||
const XmmLink& vb = XmmGet(op.rb, XmmType::Int);
|
||||
const XmmLink& vc = XmmGet(op.rt, XmmType::Int);
|
||||
const XmmLink& vc = XmmGet(op.rc, XmmType::Int);
|
||||
c->pand(vb, vc);
|
||||
c->pandn(vc, SPU_OFF_128(gpr[op.ra]));
|
||||
c->por(vb, vc);
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rc]), vb);
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rt4]), vb);
|
||||
}
|
||||
|
||||
void spu_recompiler::SHUFB(spu_opcode_t op)
|
||||
{
|
||||
const XmmLink& v0 = XmmGet(op.rt, XmmType::Int); // v0 = mask
|
||||
const XmmLink& v0 = XmmGet(op.rc, XmmType::Int); // v0 = mask
|
||||
const XmmLink& v1 = XmmAlloc();
|
||||
const XmmLink& v2 = XmmAlloc();
|
||||
const XmmLink& v3 = XmmAlloc();
|
||||
|
|
@ -2559,7 +2573,7 @@ void spu_recompiler::SHUFB(spu_opcode_t op)
|
|||
c->por(v1, v3); // v1 = select(op.rb, 00001111 - ((mask & 00011111) ^ 00010000)) | (v3)
|
||||
c->pandn(v4, v1); // filter result v4 = v1 & ((mask & 10000000 == 10000000) ? 0 : 0xff)
|
||||
c->por(vFF, v4); // final merge vFF = (mask & 10000000 == 10000000) ? ((mask & 11100000 == 11000000) ? 0xff : (mask & 11100000 == 11100000) ? 0x80 : 0) : (v1)
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rc]), vFF);
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rt4]), vFF);
|
||||
}
|
||||
|
||||
void spu_recompiler::MPYA(spu_opcode_t op)
|
||||
|
|
@ -2571,33 +2585,33 @@ void spu_recompiler::MPYA(spu_opcode_t op)
|
|||
c->pand(va, vi);
|
||||
c->pand(vb, vi);
|
||||
c->pmaddwd(va, vb);
|
||||
c->paddd(va, SPU_OFF_128(gpr[op.rt]));
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rc]), va);
|
||||
c->paddd(va, SPU_OFF_128(gpr[op.rc]));
|
||||
c->movdqa(SPU_OFF_128(gpr[op.rt4]), va);
|
||||
}
|
||||
|
||||
void spu_recompiler::FNMS(spu_opcode_t op)
|
||||
{
|
||||
const XmmLink& va = XmmGet(op.ra, XmmType::Float);
|
||||
const XmmLink& vc = XmmGet(op.rt, XmmType::Float);
|
||||
const XmmLink& vc = XmmGet(op.rc, XmmType::Float);
|
||||
c->mulps(va, SPU_OFF_128(gpr[op.rb]));
|
||||
c->subps(vc, va);
|
||||
c->movaps(SPU_OFF_128(gpr[op.rc]), vc);
|
||||
c->movaps(SPU_OFF_128(gpr[op.rt4]), vc);
|
||||
}
|
||||
|
||||
void spu_recompiler::FMA(spu_opcode_t op)
|
||||
{
|
||||
const XmmLink& va = XmmGet(op.ra, XmmType::Float);
|
||||
c->mulps(va, SPU_OFF_128(gpr[op.rb]));
|
||||
c->addps(va, SPU_OFF_128(gpr[op.rt]));
|
||||
c->movaps(SPU_OFF_128(gpr[op.rc]), va);
|
||||
c->addps(va, SPU_OFF_128(gpr[op.rc]));
|
||||
c->movaps(SPU_OFF_128(gpr[op.rt4]), va);
|
||||
}
|
||||
|
||||
void spu_recompiler::FMS(spu_opcode_t op)
|
||||
{
|
||||
const XmmLink& va = XmmGet(op.ra, XmmType::Float);
|
||||
c->mulps(va, SPU_OFF_128(gpr[op.rb]));
|
||||
c->subps(va, SPU_OFF_128(gpr[op.rt]));
|
||||
c->movaps(SPU_OFF_128(gpr[op.rc]), va);
|
||||
c->subps(va, SPU_OFF_128(gpr[op.rc]));
|
||||
c->movaps(SPU_OFF_128(gpr[op.rt4]), va);
|
||||
}
|
||||
|
||||
void spu_recompiler::UNK(spu_opcode_t op)
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue