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SPU: Enable PUTLLC16 with RTIME checks
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parent
c73302f715
commit
8b1e7c6a48
2 changed files with 5 additions and 10 deletions
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@ -6686,12 +6686,6 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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auto& stats = g_fxo->get<putllc16_statistics_t>();
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auto& stats = g_fxo->get<putllc16_statistics_t>();
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had_putllc_evaluation = true;
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had_putllc_evaluation = true;
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if (!g_cfg.core.spu_debug)
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{
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// TODO
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continue;
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}
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if (!pattern.ls_write)
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if (!pattern.ls_write)
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{
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{
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spu_log.success("PUTLLC0 Pattern Detected! (put_pc=0x%x, %s) (putllc0=%d, putllc16+0=%d, all=%d)", pattern.put_pc, func_hash, ++stats.nowrite, ++stats.single, +stats.all);
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spu_log.success("PUTLLC0 Pattern Detected! (put_pc=0x%x, %s) (putllc0=%d, putllc16+0=%d, all=%d)", pattern.put_pc, func_hash, ++stats.nowrite, ++stats.single, +stats.all);
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@ -1221,9 +1221,10 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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return;
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return;
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}
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}
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const u64 rtime = _spu->rtime;
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auto& res = vm::reservation_acquire(eal);
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auto& res = vm::reservation_acquire(eal);
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if (res & 127)
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if (res != rtime)
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{
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{
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_spu->ch_atomic_stat.set_value(MFC_PUTLLC_FAILURE);
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_spu->ch_atomic_stat.set_value(MFC_PUTLLC_FAILURE);
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_spu->set_events(SPU_EVENT_LR);
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_spu->set_events(SPU_EVENT_LR);
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@ -1234,11 +1235,11 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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rsx::reservation_lock rsx_lock(raddr, 128);
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rsx::reservation_lock rsx_lock(raddr, 128);
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// Touch memory
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// Touch memory
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vm::_ref<atomic_t<u8>>(dest).compare_and_swap_test(0, 0);
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vm::_ref<atomic_t<u8>>(dest ^ (4096 / 2)).compare_and_swap_test(0, 0);
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auto [old_res, ok] = res.fetch_op([&](u64& rval)
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auto [old_res, ok] = res.fetch_op([&](u64& rval)
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{
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{
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if (rval & 127)// || rtime != rval)
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if (rtime != rval)
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{
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{
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return false;
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return false;
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}
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}
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@ -1293,7 +1294,7 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
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const auto _new = m_ir->CreateAlignedLoad(get_type<u128>(), _ptr<u128>(m_lsptr, dest), llvm::MaybeAlign{16});
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const auto _new = m_ir->CreateAlignedLoad(get_type<u128>(), _ptr<u128>(m_lsptr, dest), llvm::MaybeAlign{16});
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const auto _rdata = m_ir->CreateAlignedLoad(get_type<u128>(), _ptr<u128>(spu_ptr<u8>(&spu_thread::rdata), m_ir->CreateAnd(diff, 0x7f)), llvm::MaybeAlign{16});
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const auto _rdata = m_ir->CreateAlignedLoad(get_type<u128>(), _ptr<u128>(spu_ptr<u8>(&spu_thread::rdata), m_ir->CreateAnd(diff, 0x7f)), llvm::MaybeAlign{16});
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const bool is_accurate_op = false && !!g_cfg.core.spu_accurate_reservations;
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const bool is_accurate_op = !!g_cfg.core.spu_accurate_reservations;
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const auto compare_data_change_res = is_accurate_op ? m_ir->getTrue() : m_ir->CreateICmpNE(_new, _rdata);
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const auto compare_data_change_res = is_accurate_op ? m_ir->getTrue() : m_ir->CreateICmpNE(_new, _rdata);
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