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Fixes
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parent
61a5459ccb
commit
8a945a1a52
8 changed files with 43 additions and 29 deletions
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@ -316,10 +316,10 @@ void ARMv7_instrs::MRC_(ARMv7Context& context, const ARMv7Code code, const ARMv7
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switch (type)
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{
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case T1:
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case A1:
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case T1: case A1:
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case T2: case A2:
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{
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cond = context.ITSTATE.advance();
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cond = type == A1 ? code.data >> 28 : context.ITSTATE.advance();
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t = (code.data & 0xf000) >> 12;
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cp = (code.data & 0xf00) >> 8;
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opc1 = (code.data & 0xe00000) >> 21;
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@ -327,8 +327,8 @@ void ARMv7_instrs::MRC_(ARMv7Context& context, const ARMv7Code code, const ARMv7
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cn = (code.data & 0xf0000) >> 16;
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cm = (code.data & 0xf);
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reject(cp - 10 < 2, "Advanced SIMD and VFP");
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reject(t == 13 && type == T1, "UNPREDICTABLE");
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reject(cp - 10 < 2 && (type == T1 || type == A1), "Advanced SIMD and VFP");
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reject(t == 13 && (type == T1 || type == T2), "UNPREDICTABLE");
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break;
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}
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default: throw __FUNCTION__;
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@ -340,6 +340,8 @@ void ARMv7_instrs::MRC_(ARMv7Context& context, const ARMv7Code code, const ARMv7
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if (t < 15 && cp == 15 && opc1 == 0 && cn == 13 && cm == 0 && opc2 == 3)
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{
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// Read CP15 User Read-only Thread ID Register (seems used as TLS address)
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if (!context.TLS)
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{
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throw "TLS not initialized";
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