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rsx: Fix vertex program analyser bug
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parent
1b1756de22
commit
85cefec5a3
2 changed files with 18 additions and 6 deletions
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@ -62,8 +62,9 @@ vertex_program_utils::vertex_program_metadata vertex_program_utils::analyse_vert
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{
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if (!has_printed_error)
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{
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// This can be harmless if a dangling RET was encountered before
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rsx_log.error("vp_analyser: Possible infinite loop detected");
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// This can be harmless if a dangling RET was encountered before.
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// This can also be legal in case of BRB...BRI loops since BRIs are conditional. Might just be a loop with exit cond.
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rsx_log.warning("vp_analyser: Possible infinite loop detected");
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has_printed_error = true;
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}
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current_instruction++;
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@ -288,6 +289,17 @@ vertex_program_utils::vertex_program_metadata vertex_program_utils::analyse_vert
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}
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}
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// Typical ubershaders have the dispatch at the top with subroutines following. However...
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// some games have the dispatch block at the end and the subroutines above them.
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// We need to simulate a jump-to-entry in this situation
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// Normally this condition is handled by the conditional_targets walk, but sometimes this doesn't work due to cyclic branches
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if (instruction_range.first < dst_prog.entry)
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{
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// Is there a subroutine that jumps into the entry? If not, add to jump table
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const auto target = dst_prog.entry - instruction_range.first;
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dst_prog.jump_table.insert(target);
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}
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// Verification
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for (const u32 target : dst_prog.jump_table)
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{
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