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7z: Update from 19.00 to 21.07
This commit is contained in:
Ani
Megamouse
parent
f6de42a2ae
commit
7ef112cf30
59 changed files with 8366 additions and 2483 deletions
154
3rdparty/7z/src/CpuArch.h
vendored
154
3rdparty/7z/src/CpuArch.h
vendored
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@ -1,5 +1,5 @@
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/* CpuArch.h -- CPU specific code
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2018-02-18 : Igor Pavlov : Public domain */
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2021-07-13 : Igor Pavlov : Public domain */
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#ifndef __CPU_ARCH_H
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#define __CPU_ARCH_H
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@ -14,6 +14,10 @@ MY_CPU_BE means that CPU is BIG ENDIAN.
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If MY_CPU_LE and MY_CPU_BE are not defined, we don't know about ENDIANNESS of platform.
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MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned memory accesses.
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MY_CPU_64BIT means that processor can work with 64-bit registers.
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MY_CPU_64BIT can be used to select fast code branch
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MY_CPU_64BIT doesn't mean that (sizeof(void *) == 8)
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*/
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#if defined(_M_X64) \
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@ -24,8 +28,10 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#define MY_CPU_AMD64
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#ifdef __ILP32__
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#define MY_CPU_NAME "x32"
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#define MY_CPU_SIZEOF_POINTER 4
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#else
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#define MY_CPU_NAME "x64"
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#define MY_CPU_SIZEOF_POINTER 8
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#endif
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#define MY_CPU_64BIT
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#endif
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@ -35,7 +41,8 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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|| defined(__i386__)
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#define MY_CPU_X86
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#define MY_CPU_NAME "x86"
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#define MY_CPU_32BIT
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/* #define MY_CPU_32BIT */
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#define MY_CPU_SIZEOF_POINTER 4
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#endif
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@ -59,8 +66,14 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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|| defined(__THUMBEL__) \
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|| defined(__THUMBEB__)
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#define MY_CPU_ARM
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#define MY_CPU_NAME "arm"
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#define MY_CPU_32BIT
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#if defined(__thumb__) || defined(__THUMBEL__) || defined(_M_ARMT)
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#define MY_CPU_NAME "armt"
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#else
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#define MY_CPU_NAME "arm"
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#endif
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/* #define MY_CPU_32BIT */
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#define MY_CPU_SIZEOF_POINTER 4
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#endif
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@ -84,17 +97,29 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#if defined(__ppc64__) \
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|| defined(__powerpc64__)
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|| defined(__powerpc64__) \
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|| defined(__ppc__) \
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|| defined(__powerpc__) \
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|| defined(__PPC__) \
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|| defined(_POWER)
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#if defined(__ppc64__) \
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|| defined(__powerpc64__) \
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|| defined(_LP64) \
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|| defined(__64BIT__)
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#ifdef __ILP32__
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#define MY_CPU_NAME "ppc64-32"
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#define MY_CPU_SIZEOF_POINTER 4
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#else
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#define MY_CPU_NAME "ppc64"
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#define MY_CPU_SIZEOF_POINTER 8
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#endif
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#define MY_CPU_64BIT
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#elif defined(__ppc__) \
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|| defined(__powerpc__)
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#else
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#define MY_CPU_NAME "ppc"
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#define MY_CPU_32BIT
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#define MY_CPU_SIZEOF_POINTER 4
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/* #define MY_CPU_32BIT */
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#endif
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#endif
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@ -111,6 +136,10 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#define MY_CPU_X86_OR_AMD64
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#endif
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#if defined(MY_CPU_ARM) || defined(MY_CPU_ARM64)
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#define MY_CPU_ARM_OR_ARM64
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#endif
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#ifdef _WIN32
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@ -170,6 +199,40 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#error Stop_Compiling_Bad_32_64_BIT
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#endif
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#ifdef __SIZEOF_POINTER__
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#ifdef MY_CPU_SIZEOF_POINTER
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#if MY_CPU_SIZEOF_POINTER != __SIZEOF_POINTER__
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#error Stop_Compiling_Bad_MY_CPU_PTR_SIZE
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#endif
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#else
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#define MY_CPU_SIZEOF_POINTER __SIZEOF_POINTER__
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#endif
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#endif
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#if defined(MY_CPU_SIZEOF_POINTER) && (MY_CPU_SIZEOF_POINTER == 4)
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#if defined (_LP64)
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#error Stop_Compiling_Bad_MY_CPU_PTR_SIZE
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#endif
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#endif
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#ifdef _MSC_VER
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#if _MSC_VER >= 1300
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#define MY_CPU_pragma_pack_push_1 __pragma(pack(push, 1))
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#define MY_CPU_pragma_pop __pragma(pack(pop))
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#else
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#define MY_CPU_pragma_pack_push_1
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#define MY_CPU_pragma_pop
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#endif
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#else
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#ifdef __xlC__
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#define MY_CPU_pragma_pack_push_1 _Pragma("pack(1)")
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#define MY_CPU_pragma_pop _Pragma("pack()")
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#else
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#define MY_CPU_pragma_pack_push_1 _Pragma("pack(push, 1)")
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#define MY_CPU_pragma_pop _Pragma("pack(pop)")
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#endif
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#endif
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#ifndef MY_CPU_NAME
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#ifdef MY_CPU_LE
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@ -189,8 +252,12 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#ifdef MY_CPU_LE
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#if defined(MY_CPU_X86_OR_AMD64) \
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|| defined(MY_CPU_ARM64) \
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|| defined(__ARM_FEATURE_UNALIGNED)
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|| defined(MY_CPU_ARM64)
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#define MY_CPU_LE_UNALIGN
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#define MY_CPU_LE_UNALIGN_64
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#elif defined(__ARM_FEATURE_UNALIGNED)
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/* gcc9 for 32-bit arm can use LDRD instruction that requires 32-bit alignment.
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So we can't use unaligned 64-bit operations. */
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#define MY_CPU_LE_UNALIGN
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#endif
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#endif
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@ -200,11 +267,15 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#define GetUi16(p) (*(const UInt16 *)(const void *)(p))
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#define GetUi32(p) (*(const UInt32 *)(const void *)(p))
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#ifdef MY_CPU_LE_UNALIGN_64
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#define GetUi64(p) (*(const UInt64 *)(const void *)(p))
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#endif
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#define SetUi16(p, v) { *(UInt16 *)(p) = (v); }
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#define SetUi32(p, v) { *(UInt32 *)(p) = (v); }
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#define SetUi64(p, v) { *(UInt64 *)(p) = (v); }
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#define SetUi16(p, v) { *(UInt16 *)(void *)(p) = (v); }
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#define SetUi32(p, v) { *(UInt32 *)(void *)(p) = (v); }
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#ifdef MY_CPU_LE_UNALIGN_64
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#define SetUi64(p, v) { *(UInt64 *)(void *)(p) = (v); }
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#endif
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#else
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@ -218,8 +289,6 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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((UInt32)((const Byte *)(p))[2] << 16) | \
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((UInt32)((const Byte *)(p))[3] << 24))
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#define GetUi64(p) (GetUi32(p) | ((UInt64)GetUi32(((const Byte *)(p)) + 4) << 32))
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#define SetUi16(p, v) { Byte *_ppp_ = (Byte *)(p); UInt32 _vvv_ = (v); \
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_ppp_[0] = (Byte)_vvv_; \
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_ppp_[1] = (Byte)(_vvv_ >> 8); }
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@ -230,19 +299,29 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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_ppp_[2] = (Byte)(_vvv_ >> 16); \
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_ppp_[3] = (Byte)(_vvv_ >> 24); }
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#endif
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#ifndef MY_CPU_LE_UNALIGN_64
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#define GetUi64(p) (GetUi32(p) | ((UInt64)GetUi32(((const Byte *)(p)) + 4) << 32))
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#define SetUi64(p, v) { Byte *_ppp2_ = (Byte *)(p); UInt64 _vvv2_ = (v); \
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SetUi32(_ppp2_ , (UInt32)_vvv2_); \
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SetUi32(_ppp2_ + 4, (UInt32)(_vvv2_ >> 32)); }
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#endif
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#ifdef __has_builtin
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#define MY__has_builtin(x) __has_builtin(x)
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#else
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#define MY__has_builtin(x) 0
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#endif
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#if defined(MY_CPU_LE_UNALIGN) && /* defined(_WIN64) && */ (_MSC_VER >= 1300)
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#if defined(MY_CPU_LE_UNALIGN) && /* defined(_WIN64) && */ defined(_MSC_VER) && (_MSC_VER >= 1300)
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/* Note: we use bswap instruction, that is unsupported in 386 cpu */
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@ -253,8 +332,8 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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#pragma intrinsic(_byteswap_uint64)
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/* #define GetBe16(p) _byteswap_ushort(*(const UInt16 *)(const Byte *)(p)) */
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#define GetBe32(p) _byteswap_ulong(*(const UInt32 *)(const Byte *)(p))
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#define GetBe64(p) _byteswap_uint64(*(const UInt64 *)(const Byte *)(p))
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#define GetBe32(p) _byteswap_ulong (*(const UInt32 *)(const void *)(p))
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#define GetBe64(p) _byteswap_uint64(*(const UInt64 *)(const void *)(p))
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#define SetBe32(p, v) (*(UInt32 *)(void *)(p)) = _byteswap_ulong(v)
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@ -262,9 +341,9 @@ MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned mem
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(defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3))) \
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|| (defined(__clang__) && MY__has_builtin(__builtin_bswap16)) )
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/* #define GetBe16(p) __builtin_bswap16(*(const UInt16 *)(const Byte *)(p)) */
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#define GetBe32(p) __builtin_bswap32(*(const UInt32 *)(const Byte *)(p))
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#define GetBe64(p) __builtin_bswap64(*(const UInt64 *)(const Byte *)(p))
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/* #define GetBe16(p) __builtin_bswap16(*(const UInt16 *)(const void *)(p)) */
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#define GetBe32(p) __builtin_bswap32(*(const UInt32 *)(const void *)(p))
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#define GetBe64(p) __builtin_bswap64(*(const UInt64 *)(const void *)(p))
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#define SetBe32(p, v) (*(UInt32 *)(void *)(p)) = __builtin_bswap32(v)
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@ -325,10 +404,37 @@ int x86cpuid_GetFirm(const Cx86cpuid *p);
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#define x86cpuid_GetModel(ver) (((ver >> 12) & 0xF0) | ((ver >> 4) & 0xF))
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#define x86cpuid_GetStepping(ver) (ver & 0xF)
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BoolInt CPU_Is_InOrder();
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BoolInt CPU_Is_Aes_Supported();
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BoolInt CPU_IsSupported_PageGB();
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BoolInt CPU_Is_InOrder(void);
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BoolInt CPU_IsSupported_AES(void);
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BoolInt CPU_IsSupported_AVX2(void);
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BoolInt CPU_IsSupported_VAES_AVX2(void);
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BoolInt CPU_IsSupported_SSSE3(void);
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BoolInt CPU_IsSupported_SSE41(void);
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BoolInt CPU_IsSupported_SHA(void);
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BoolInt CPU_IsSupported_PageGB(void);
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#elif defined(MY_CPU_ARM_OR_ARM64)
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BoolInt CPU_IsSupported_CRC32(void);
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BoolInt CPU_IsSupported_NEON(void);
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#if defined(_WIN32)
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BoolInt CPU_IsSupported_CRYPTO(void);
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#define CPU_IsSupported_SHA1 CPU_IsSupported_CRYPTO
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#define CPU_IsSupported_SHA2 CPU_IsSupported_CRYPTO
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#define CPU_IsSupported_AES CPU_IsSupported_CRYPTO
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#else
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BoolInt CPU_IsSupported_SHA1(void);
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BoolInt CPU_IsSupported_SHA2(void);
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BoolInt CPU_IsSupported_AES(void);
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#endif
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#endif
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#if defined(__APPLE__)
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int My_sysctlbyname_Get(const char *name, void *buf, size_t *bufSize);
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int My_sysctlbyname_Get_UInt32(const char *name, UInt32 *val);
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#endif
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EXTERN_C_END
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