archive/rpcs3
1
0
Fork 0
mirror of https://github.com/RPCS3/rpcs3.git synced 2025-07-07 07:21:25 +12:00
Code Issues Projects Releases Packages Wiki Activity Actions

llvm: Reenable debug info dump

Browse source
This commit is contained in:
Vincent Lejeune 2015-12-21 02:22:34 +01:00
parent 3ed603074c
commit 743f5f07cb
1 changed files with 11 additions and 16 deletions
Download patch file Download diff file Expand all files Collapse all files

27
rpcs3/Emu/Cell/PPULLVMRecompiler.cpp
View file

@ -133,12 +133,6 @@ void ppu_recompiler_llvm::Compiler::translate_to_llvm_ir(llvm::Module *module, c
m_ir_builder->SetInsertPoint(GetBasicBlockFromAddress(0)); m_ir_builder->SetInsertPoint(GetBasicBlockFromAddress(0));
m_ir_builder->CreateBr(GetBasicBlockFromAddress(start_address)); m_ir_builder->CreateBr(GetBasicBlockFromAddress(start_address));
// Used to decode instructions
PPUDisAsm dis_asm(CPUDisAsm_DumpMode);
dis_asm.offset = vm::ps3::_ptr<u8>(start_address);
// m_recompilation_engine.Log() << "Recompiling block :\n\n";
// Convert each instruction in the CFG to LLVM IR // Convert each instruction in the CFG to LLVM IR
std::vector<PHINode *> exit_instr_list; std::vector<PHINode *> exit_instr_list;
for (u32 instructionAddress = start_address; instructionAddress < start_address + instruction_count * 4; instructionAddress += 4) { for (u32 instructionAddress = start_address; instructionAddress < start_address + instruction_count * 4; instructionAddress += 4) {
@ -149,11 +143,6 @@ void ppu_recompiler_llvm::Compiler::translate_to_llvm_ir(llvm::Module *module, c
u32 instr = vm::ps3::read32(instructionAddress); u32 instr = vm::ps3::read32(instructionAddress);
// Dump PPU opcode
dis_asm.dump_pc = instructionAddress;
(*PPU_instr::main_list)(&dis_asm, instr);
// m_recompilation_engine.Log() << dis_asm.last_opcode;
Decode(instr); Decode(instr);
if (!m_state.hit_branch_instruction) if (!m_state.hit_branch_instruction)
m_ir_builder->CreateBr(GetBasicBlockFromAddress(instructionAddress + 4)); m_ir_builder->CreateBr(GetBasicBlockFromAddress(instructionAddress + 4));
@ -196,9 +185,6 @@ void ppu_recompiler_llvm::Compiler::translate_to_llvm_ir(llvm::Module *module, c
} }
} }
// m_recompilation_engine.Log() << "LLVM bytecode:\n";
// m_recompilation_engine.Log() << *m_module;
std::string verify; std::string verify;
raw_string_ostream verify_ostream(verify); raw_string_ostream verify_ostream(verify);
if (verifyFunction(*m_state.function, &verify_ostream)) { if (verifyFunction(*m_state.function, &verify_ostream)) {
@ -392,9 +378,11 @@ std::pair<Executable, llvm::ExecutionEngine *> RecompilationEngine::compile(cons
Compiler(&m_llvm_context, &m_ir_builder, function_ptrs) Compiler(&m_llvm_context, &m_ir_builder, function_ptrs)
.translate_to_llvm_ir(module.get(), name, start_address, instruction_count); .translate_to_llvm_ir(module.get(), name, start_address, instruction_count);
Compiler::optimise_module(module.get());
llvm::Module *module_ptr = module.get(); llvm::Module *module_ptr = module.get();
Log() << *module_ptr;
Compiler::optimise_module(module_ptr);
llvm::ExecutionEngine *execution_engine = llvm::ExecutionEngine *execution_engine =
EngineBuilder(std::move(module)) EngineBuilder(std::move(module))
@ -441,10 +429,17 @@ bool RecompilationEngine::AnalyseBlock(BlockEntry &functionData, size_t maxSize)
functionData.calledFunctions.clear(); functionData.calledFunctions.clear();
functionData.is_analysed = true; functionData.is_analysed = true;
functionData.is_compilable_function = true; functionData.is_compilable_function = true;
Log() << "Analysing " << (void*)(uint64_t)startAddress << "\n"; Log() << "Analysing " << (void*)(uint64_t)startAddress << "hit " << functionData.num_hits << "\n";
// Used to decode instructions
PPUDisAsm dis_asm(CPUDisAsm_DumpMode);
dis_asm.offset = vm::ps3::_ptr<u8>(startAddress);
for (size_t instructionAddress = startAddress; instructionAddress < startAddress + maxSize; instructionAddress += 4) for (size_t instructionAddress = startAddress; instructionAddress < startAddress + maxSize; instructionAddress += 4)
{ {
u32 instr = vm::ps3::read32((u32)instructionAddress); u32 instr = vm::ps3::read32((u32)instructionAddress);
dis_asm.dump_pc = instructionAddress - startAddress;
(*PPU_instr::main_list)(&dis_asm, instr);
Log() << dis_asm.last_opcode;
functionData.instructionCount++; functionData.instructionCount++;
if (instr == PPU_instr::implicts::BLR() && instructionAddress >= farthestBranchTarget && functionData.is_compilable_function) if (instr == PPU_instr::implicts::BLR() && instructionAddress >= farthestBranchTarget && functionData.is_compilable_function)
{ {