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spu/arm64: fix 16 byte branch patch alignment
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parent
b37217b181
commit
73ed657e00
1 changed files with 5 additions and 2 deletions
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@ -1578,7 +1578,12 @@ spu_function_t spu_runtime::make_branch_patchpoint(u16 data) const
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// Save the jmp addr to GHC CC 3rd arg -> REG_Hp
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// Save the jmp addr to GHC CC 3rd arg -> REG_Hp
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Label replace_addr = c.newLabel();
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Label replace_addr = c.newLabel();
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c.adr(a64::x21, replace_addr);
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c.adr(a64::x21, replace_addr);
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// 16 byte alignment for the jump replacement
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c.nop();
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c.nop();
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c.nop();
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Label branch_target = c.newLabel();
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Label branch_target = c.newLabel();
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c.bind(replace_addr);
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c.bind(replace_addr);
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@ -1641,7 +1646,6 @@ void spu_recompiler_base::dispatch(spu_thread& spu, void*, u8* rip)
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c.bind(branch_target);
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c.bind(branch_target);
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c.embedUInt64(reinterpret_cast<u64>(spu_runtime::tr_all));
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c.embedUInt64(reinterpret_cast<u64>(spu_runtime::tr_all));
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});
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});
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// 128 bit load/store is atomic on Armv8.4+
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u128 result = *reinterpret_cast<u128*>(jump_instrs);
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u128 result = *reinterpret_cast<u128*>(jump_instrs);
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#if defined(__APPLE__)
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#if defined(__APPLE__)
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pthread_jit_write_protect_np(false);
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pthread_jit_write_protect_np(false);
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@ -1774,7 +1778,6 @@ void spu_recompiler_base::branch(spu_thread& spu, void*, u8* rip)
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c.bind(branch_target);
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c.bind(branch_target);
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c.embedUInt64(reinterpret_cast<u64>(func));
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c.embedUInt64(reinterpret_cast<u64>(func));
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});
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});
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// 128 bit load/store is atomic on Armv8.4+
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u128 result = *reinterpret_cast<u128*>(jmp_instrs);
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u128 result = *reinterpret_cast<u128*>(jmp_instrs);
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#if defined(__APPLE__)
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#if defined(__APPLE__)
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pthread_jit_write_protect_np(false);
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pthread_jit_write_protect_np(false);
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