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https://github.com/RPCS3/rpcs3.git
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VM_CAST macro
This commit is contained in:
Nekotekina
parent
8c00dcd02d
commit
721ad404d2
17 changed files with 259 additions and 257 deletions
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@ -1733,7 +1733,7 @@ void ppu_interpreter::LVSL(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LVEBX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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CPU.VPR[op.vd]._u8[15 - (addr & 0xf)] = vm::read8(vm::cast(addr));
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CPU.VPR[op.vd]._u8[15 - (addr & 0xf)] = vm::read8(VM_CAST(addr));
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}
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void ppu_interpreter::SUBFC(PPUThread& CPU, ppu_opcode_t op)
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@ -1780,7 +1780,7 @@ void ppu_interpreter::LWARX(PPUThread& CPU, ppu_opcode_t op)
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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be_t<u32> value;
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vm::reservation_acquire(&value, vm::cast(addr), sizeof(value));
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vm::reservation_acquire(&value, VM_CAST(addr), sizeof32(value));
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CPU.GPR[op.rd] = value;
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}
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@ -1788,13 +1788,13 @@ void ppu_interpreter::LWARX(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LDX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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CPU.GPR[op.rd] = vm::read64(vm::cast(addr));
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CPU.GPR[op.rd] = vm::read64(VM_CAST(addr));
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}
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void ppu_interpreter::LWZX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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CPU.GPR[op.rd] = vm::read32(vm::cast(addr));
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CPU.GPR[op.rd] = vm::read32(VM_CAST(addr));
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}
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void ppu_interpreter::SLW(PPUThread& CPU, ppu_opcode_t op)
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@ -1873,7 +1873,7 @@ void ppu_interpreter::LVSR(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LVEHX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb]) & ~1ULL;
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CPU.VPR[op.vd]._u16[7 - ((addr >> 1) & 0x7)] = vm::read16(vm::cast(addr));
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CPU.VPR[op.vd]._u16[7 - ((addr >> 1) & 0x7)] = vm::read16(VM_CAST(addr));
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}
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void ppu_interpreter::SUBF(PPUThread& CPU, ppu_opcode_t op)
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@ -1888,7 +1888,7 @@ void ppu_interpreter::SUBF(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LDUX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
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CPU.GPR[op.rd] = vm::read64(vm::cast(addr));
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CPU.GPR[op.rd] = vm::read64(VM_CAST(addr));
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CPU.GPR[op.ra] = addr;
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}
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@ -1899,7 +1899,7 @@ void ppu_interpreter::DCBST(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LWZUX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
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CPU.GPR[op.rd] = vm::read32(vm::cast(addr));
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CPU.GPR[op.rd] = vm::read32(VM_CAST(addr));
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CPU.GPR[op.ra] = addr;
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}
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@ -1929,7 +1929,7 @@ void ppu_interpreter::TD(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LVEWX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb]) & ~3ULL;
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CPU.VPR[op.vd]._u32[3 - ((addr >> 2) & 0x3)] = vm::read32(vm::cast(addr));
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CPU.VPR[op.vd]._u32[3 - ((addr >> 2) & 0x3)] = vm::read32(VM_CAST(addr));
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}
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void ppu_interpreter::MULHD(PPUThread& CPU, ppu_opcode_t op)
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@ -1951,7 +1951,7 @@ void ppu_interpreter::LDARX(PPUThread& CPU, ppu_opcode_t op)
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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be_t<u64> value;
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vm::reservation_acquire(&value, vm::cast(addr), sizeof(value));
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vm::reservation_acquire(&value, VM_CAST(addr), sizeof32(value));
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CPU.GPR[op.rd] = value;
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}
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@ -1963,13 +1963,13 @@ void ppu_interpreter::DCBF(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LBZX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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CPU.GPR[op.rd] = vm::read8(vm::cast(addr));
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CPU.GPR[op.rd] = vm::read8(VM_CAST(addr));
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}
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void ppu_interpreter::LVX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb]) & ~0xfull;
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CPU.VPR[op.vd] = vm::read128(vm::cast(addr));
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CPU.VPR[op.vd] = vm::read128(VM_CAST(addr));
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}
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void ppu_interpreter::NEG(PPUThread& CPU, ppu_opcode_t op)
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@ -1983,7 +1983,7 @@ void ppu_interpreter::NEG(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LBZUX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
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CPU.GPR[op.rd] = vm::read8(vm::cast(addr));
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CPU.GPR[op.rd] = vm::read8(VM_CAST(addr));
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CPU.GPR[op.ra] = addr;
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}
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@ -1997,7 +1997,7 @@ void ppu_interpreter::STVEBX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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const u8 eb = addr & 0xf;
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vm::write8(vm::cast(addr), CPU.VPR[op.vs]._u8[15 - eb]);
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vm::write8(VM_CAST(addr), CPU.VPR[op.vs]._u8[15 - eb]);
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}
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void ppu_interpreter::SUBFE(PPUThread& CPU, ppu_opcode_t op)
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@ -2073,7 +2073,7 @@ void ppu_interpreter::MTOCRF(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::STDX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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vm::write64(vm::cast(addr), CPU.GPR[op.rs]);
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vm::write64(VM_CAST(addr), CPU.GPR[op.rs]);
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}
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void ppu_interpreter::STWCX_(PPUThread& CPU, ppu_opcode_t op)
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@ -2081,33 +2081,33 @@ void ppu_interpreter::STWCX_(PPUThread& CPU, ppu_opcode_t op)
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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const be_t<u32> value = (u32)CPU.GPR[op.rs];
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CPU.SetCR_EQ(0, vm::reservation_update(vm::cast(addr), &value, sizeof(value)));
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CPU.SetCR_EQ(0, vm::reservation_update(VM_CAST(addr), &value, sizeof32(value)));
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}
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void ppu_interpreter::STWX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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vm::write32(vm::cast(addr), (u32)CPU.GPR[op.rs]);
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vm::write32(VM_CAST(addr), (u32)CPU.GPR[op.rs]);
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}
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void ppu_interpreter::STVEHX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb]) & ~1ULL;
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const u8 eb = (addr & 0xf) >> 1;
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vm::write16(vm::cast(addr), CPU.VPR[op.vs]._u16[7 - eb]);
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vm::write16(VM_CAST(addr), CPU.VPR[op.vs]._u16[7 - eb]);
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}
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void ppu_interpreter::STDUX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
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vm::write64(vm::cast(addr), CPU.GPR[op.rs]);
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vm::write64(VM_CAST(addr), CPU.GPR[op.rs]);
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CPU.GPR[op.ra] = addr;
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}
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void ppu_interpreter::STWUX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
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vm::write32(vm::cast(addr), (u32)CPU.GPR[op.rs]);
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vm::write32(VM_CAST(addr), (u32)CPU.GPR[op.rs]);
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CPU.GPR[op.ra] = addr;
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}
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@ -2115,7 +2115,7 @@ void ppu_interpreter::STVEWX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb]) & ~3ULL;
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const u8 eb = (addr & 0xf) >> 2;
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vm::write32(vm::cast(addr), CPU.VPR[op.vs]._u32[3 - eb]);
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vm::write32(VM_CAST(addr), CPU.VPR[op.vs]._u32[3 - eb]);
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}
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void ppu_interpreter::SUBFZE(PPUThread& CPU, ppu_opcode_t op)
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@ -2141,19 +2141,19 @@ void ppu_interpreter::STDCX_(PPUThread& CPU, ppu_opcode_t op)
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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const be_t<u64> value = CPU.GPR[op.rs];
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CPU.SetCR_EQ(0, vm::reservation_update(vm::cast(addr), &value, sizeof(value)));
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CPU.SetCR_EQ(0, vm::reservation_update(VM_CAST(addr), &value, sizeof32(value)));
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}
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void ppu_interpreter::STBX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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vm::write8(vm::cast(addr), (u8)CPU.GPR[op.rs]);
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vm::write8(VM_CAST(addr), (u8)CPU.GPR[op.rs]);
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}
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void ppu_interpreter::STVX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb]) & ~0xfull;
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vm::write128(vm::cast(addr), CPU.VPR[op.vs]);
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vm::write128(VM_CAST(addr), CPU.VPR[op.vs]);
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}
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void ppu_interpreter::MULLD(PPUThread& CPU, ppu_opcode_t op)
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@ -2202,7 +2202,7 @@ void ppu_interpreter::DCBTST(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::STBUX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
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vm::write8(vm::cast(addr), (u8)CPU.GPR[op.rs]);
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vm::write8(VM_CAST(addr), (u8)CPU.GPR[op.rs]);
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CPU.GPR[op.ra] = addr;
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}
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@ -2222,7 +2222,7 @@ void ppu_interpreter::DCBT(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LHZX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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CPU.GPR[op.rd] = vm::read16(vm::cast(addr));
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CPU.GPR[op.rd] = vm::read16(VM_CAST(addr));
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}
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void ppu_interpreter::EQV(PPUThread& CPU, ppu_opcode_t op)
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@ -2239,7 +2239,7 @@ void ppu_interpreter::ECIWX(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LHZUX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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CPU.GPR[op.rd] = vm::read16(vm::cast(addr));
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CPU.GPR[op.rd] = vm::read16(VM_CAST(addr));
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CPU.GPR[op.ra] = addr;
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}
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@ -2280,7 +2280,7 @@ void ppu_interpreter::MFSPR(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LWAX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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CPU.GPR[op.rd] = (s64)(s32)vm::read32(vm::cast(addr));
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CPU.GPR[op.rd] = (s64)(s32)vm::read32(VM_CAST(addr));
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}
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void ppu_interpreter::DST(PPUThread& CPU, ppu_opcode_t op)
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@ -2290,13 +2290,13 @@ void ppu_interpreter::DST(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LHAX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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CPU.GPR[op.rd] = (s64)(s16)vm::read16(vm::cast(addr));
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CPU.GPR[op.rd] = (s64)(s16)vm::read16(VM_CAST(addr));
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}
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void ppu_interpreter::LVXL(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb]) & ~0xfull;
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CPU.VPR[op.vd] = vm::read128(vm::cast(addr));
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CPU.VPR[op.vd] = vm::read128(VM_CAST(addr));
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}
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void ppu_interpreter::MFTB(PPUThread& CPU, ppu_opcode_t op)
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@ -2315,7 +2315,7 @@ void ppu_interpreter::MFTB(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LWAUX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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CPU.GPR[op.rd] = (s64)(s32)vm::read32(vm::cast(addr));
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CPU.GPR[op.rd] = (s64)(s32)vm::read32(VM_CAST(addr));
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CPU.GPR[op.ra] = addr;
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}
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@ -2326,14 +2326,14 @@ void ppu_interpreter::DSTST(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::LHAUX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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CPU.GPR[op.rd] = (s64)(s16)vm::read16(vm::cast(addr));
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CPU.GPR[op.rd] = (s64)(s16)vm::read16(VM_CAST(addr));
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CPU.GPR[op.ra] = addr;
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}
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void ppu_interpreter::STHX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
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vm::write16(vm::cast(addr), (u16)CPU.GPR[op.rs]);
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vm::write16(VM_CAST(addr), (u16)CPU.GPR[op.rs]);
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}
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void ppu_interpreter::ORC(PPUThread& CPU, ppu_opcode_t op)
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@ -2350,7 +2350,7 @@ void ppu_interpreter::ECOWX(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::STHUX(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
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vm::write16(vm::cast(addr), (u16)CPU.GPR[op.rs]);
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vm::write16(VM_CAST(addr), (u16)CPU.GPR[op.rs]);
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CPU.GPR[op.ra] = addr;
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}
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@ -2436,7 +2436,7 @@ void ppu_interpreter::NAND(PPUThread& CPU, ppu_opcode_t op)
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void ppu_interpreter::STVXL(PPUThread& CPU, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb]) & ~0xfull;
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vm::write128(vm::cast(addr), CPU.VPR[op.vs]);
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vm::write128(VM_CAST(addr), CPU.VPR[op.vs]);
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}
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void ppu_interpreter::DIVD(PPUThread& CPU, ppu_opcode_t op)
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@ -2483,13 +2483,13 @@ void ppu_interpreter::LVLX(PPUThread& CPU, ppu_opcode_t op)
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const u32 eb = addr & 0xf;
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CPU.VPR[op.vd].clear();
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for (u32 i = 0; i < 16u - eb; ++i) CPU.VPR[op.vd]._u8[15 - i] = vm::read8(vm::cast(addr + i));
|
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for (u32 i = 0; i < 16u - eb; ++i) CPU.VPR[op.vd]._u8[15 - i] = vm::read8(VM_CAST(addr + i));
|
||||
}
|
||||
|
||||
void ppu_interpreter::LDBRX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
CPU.GPR[op.rd] = vm::get_ref<u64>(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::get_ref<u64>(VM_CAST(addr));
|
||||
}
|
||||
|
||||
void ppu_interpreter::LSWX(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -2498,14 +2498,14 @@ void ppu_interpreter::LSWX(PPUThread& CPU, ppu_opcode_t op)
|
|||
u32 count = CPU.XER.XER & 0x7F;
|
||||
for (; count >= 4; count -= 4, addr += 4, op.rd = (op.rd + 1) & 31)
|
||||
{
|
||||
CPU.GPR[op.rd] = vm::get_ref<be_t<u32>>(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::get_ref<be_t<u32>>(VM_CAST(addr));
|
||||
}
|
||||
if (count)
|
||||
{
|
||||
u32 value = 0;
|
||||
for (u32 byte = 0; byte < count; byte++)
|
||||
{
|
||||
u32 byte_value = vm::get_ref<u8>(vm::cast(addr + byte));
|
||||
u32 byte_value = vm::get_ref<u8>(VM_CAST(addr + byte));
|
||||
value |= byte_value << ((3 ^ byte) * 8);
|
||||
}
|
||||
CPU.GPR[op.rd] = value;
|
||||
|
|
@ -2515,13 +2515,13 @@ void ppu_interpreter::LSWX(PPUThread& CPU, ppu_opcode_t op)
|
|||
void ppu_interpreter::LWBRX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
CPU.GPR[op.rd] = vm::get_ref<u32>(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::get_ref<u32>(VM_CAST(addr));
|
||||
}
|
||||
|
||||
void ppu_interpreter::LFSX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<float>>(vm::cast(addr)).value();
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<float>>(VM_CAST(addr)).value();
|
||||
}
|
||||
|
||||
void ppu_interpreter::SRW(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -2550,7 +2550,7 @@ void ppu_interpreter::LVRX(PPUThread& CPU, ppu_opcode_t op)
|
|||
const u8 eb = addr & 0xf;
|
||||
|
||||
CPU.VPR[op.vd].clear();
|
||||
for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[op.vd]._u8[15 - i] = vm::read8(vm::cast(addr + i - 16));
|
||||
for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[op.vd]._u8[15 - i] = vm::read8(VM_CAST(addr + i - 16));
|
||||
}
|
||||
|
||||
void ppu_interpreter::LSWI(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -2563,7 +2563,7 @@ void ppu_interpreter::LSWI(PPUThread& CPU, ppu_opcode_t op)
|
|||
{
|
||||
if (N > 3)
|
||||
{
|
||||
CPU.GPR[reg] = vm::read32(vm::cast(addr));
|
||||
CPU.GPR[reg] = vm::read32(VM_CAST(addr));
|
||||
addr += 4;
|
||||
N -= 4;
|
||||
}
|
||||
|
|
@ -2574,7 +2574,7 @@ void ppu_interpreter::LSWI(PPUThread& CPU, ppu_opcode_t op)
|
|||
while (N > 0)
|
||||
{
|
||||
N = N - 1;
|
||||
buf |= vm::read8(vm::cast(addr)) << (i * 8);
|
||||
buf |= vm::read8(VM_CAST(addr)) << (i * 8);
|
||||
addr++;
|
||||
i--;
|
||||
}
|
||||
|
|
@ -2587,7 +2587,7 @@ void ppu_interpreter::LSWI(PPUThread& CPU, ppu_opcode_t op)
|
|||
void ppu_interpreter::LFSUX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<float>>(vm::cast(addr)).value();
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<float>>(VM_CAST(addr)).value();
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
|
|
@ -2599,13 +2599,13 @@ void ppu_interpreter::SYNC(PPUThread& CPU, ppu_opcode_t op)
|
|||
void ppu_interpreter::LFDX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<double>>(vm::cast(addr)).value();
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<double>>(VM_CAST(addr)).value();
|
||||
}
|
||||
|
||||
void ppu_interpreter::LFDUX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<double>>(vm::cast(addr)).value();
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<double>>(VM_CAST(addr)).value();
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
|
|
@ -2614,13 +2614,13 @@ void ppu_interpreter::STVLX(PPUThread& CPU, ppu_opcode_t op)
|
|||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
const u32 eb = addr & 0xf;
|
||||
|
||||
for (u32 i = 0; i < 16u - eb; ++i) vm::write8(vm::cast(addr + i), CPU.VPR[op.vs]._u8[15 - i]);
|
||||
for (u32 i = 0; i < 16u - eb; ++i) vm::write8(VM_CAST(addr + i), CPU.VPR[op.vs]._u8[15 - i]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::STDBRX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
vm::get_ref<u64>(vm::cast(addr)) = CPU.GPR[op.rs];
|
||||
vm::get_ref<u64>(VM_CAST(addr)) = CPU.GPR[op.rs];
|
||||
}
|
||||
|
||||
void ppu_interpreter::STSWX(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -2629,7 +2629,7 @@ void ppu_interpreter::STSWX(PPUThread& CPU, ppu_opcode_t op)
|
|||
u32 count = CPU.XER.XER & 0x7F;
|
||||
for (; count >= 4; count -= 4, addr += 4, op.rs = (op.rs + 1) & 31)
|
||||
{
|
||||
vm::write32(vm::cast(addr), (u32)CPU.GPR[op.rs]);
|
||||
vm::write32(VM_CAST(addr), (u32)CPU.GPR[op.rs]);
|
||||
}
|
||||
if (count)
|
||||
{
|
||||
|
|
@ -2637,7 +2637,7 @@ void ppu_interpreter::STSWX(PPUThread& CPU, ppu_opcode_t op)
|
|||
for (u32 byte = 0; byte < count; byte++)
|
||||
{
|
||||
u32 byte_value = (u8)(value >> ((3 ^ byte) * 8));
|
||||
vm::write8(vm::cast(addr + byte), byte_value);
|
||||
vm::write8(VM_CAST(addr + byte), byte_value);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -2645,13 +2645,13 @@ void ppu_interpreter::STSWX(PPUThread& CPU, ppu_opcode_t op)
|
|||
void ppu_interpreter::STWBRX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
vm::get_ref<u32>(vm::cast(addr)) = (u32)CPU.GPR[op.rs];
|
||||
vm::get_ref<u32>(VM_CAST(addr)) = (u32)CPU.GPR[op.rs];
|
||||
}
|
||||
|
||||
void ppu_interpreter::STFSX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
vm::get_ref<be_t<float>>(vm::cast(addr)) = static_cast<float>(CPU.FPR[op.frs]);
|
||||
vm::get_ref<be_t<float>>(VM_CAST(addr)) = static_cast<float>(CPU.FPR[op.frs]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::STVRX(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -2659,13 +2659,13 @@ void ppu_interpreter::STVRX(PPUThread& CPU, ppu_opcode_t op)
|
|||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
const u8 eb = addr & 0xf;
|
||||
|
||||
for (u32 i = 16 - eb; i < 16; ++i) vm::write8(vm::cast(addr + i - 16), CPU.VPR[op.vs]._u8[15 - i]);
|
||||
for (u32 i = 16 - eb; i < 16; ++i) vm::write8(VM_CAST(addr + i - 16), CPU.VPR[op.vs]._u8[15 - i]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::STFSUX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
|
||||
vm::get_ref<be_t<float>>(vm::cast(addr)) = static_cast<float>(CPU.FPR[op.frs]);
|
||||
vm::get_ref<be_t<float>>(VM_CAST(addr)) = static_cast<float>(CPU.FPR[op.frs]);
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
|
|
@ -2679,7 +2679,7 @@ void ppu_interpreter::STSWI(PPUThread& CPU, ppu_opcode_t op)
|
|||
{
|
||||
if (N > 3)
|
||||
{
|
||||
vm::write32(vm::cast(addr), (u32)CPU.GPR[reg]);
|
||||
vm::write32(VM_CAST(addr), (u32)CPU.GPR[reg]);
|
||||
addr += 4;
|
||||
N -= 4;
|
||||
}
|
||||
|
|
@ -2689,7 +2689,7 @@ void ppu_interpreter::STSWI(PPUThread& CPU, ppu_opcode_t op)
|
|||
while (N > 0)
|
||||
{
|
||||
N = N - 1;
|
||||
vm::write8(vm::cast(addr), (0xFF000000 & buf) >> 24);
|
||||
vm::write8(VM_CAST(addr), (0xFF000000 & buf) >> 24);
|
||||
buf <<= 8;
|
||||
addr++;
|
||||
}
|
||||
|
|
@ -2701,13 +2701,13 @@ void ppu_interpreter::STSWI(PPUThread& CPU, ppu_opcode_t op)
|
|||
void ppu_interpreter::STFDX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
vm::get_ref<be_t<double>>(vm::cast(addr)) = CPU.FPR[op.frs];
|
||||
vm::get_ref<be_t<double>>(VM_CAST(addr)) = CPU.FPR[op.frs];
|
||||
}
|
||||
|
||||
void ppu_interpreter::STFDUX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + CPU.GPR[op.rb];
|
||||
vm::get_ref<be_t<double>>(vm::cast(addr)) = CPU.FPR[op.frs];
|
||||
vm::get_ref<be_t<double>>(VM_CAST(addr)) = CPU.FPR[op.frs];
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
|
|
@ -2717,13 +2717,13 @@ void ppu_interpreter::LVLXL(PPUThread& CPU, ppu_opcode_t op)
|
|||
const u32 eb = addr & 0xf;
|
||||
|
||||
CPU.VPR[op.vd].clear();
|
||||
for (u32 i = 0; i < 16u - eb; ++i) CPU.VPR[op.vd]._u8[15 - i] = vm::read8(vm::cast(addr + i));
|
||||
for (u32 i = 0; i < 16u - eb; ++i) CPU.VPR[op.vd]._u8[15 - i] = vm::read8(VM_CAST(addr + i));
|
||||
}
|
||||
|
||||
void ppu_interpreter::LHBRX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
CPU.GPR[op.rd] = vm::get_ref<u16>(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::get_ref<u16>(VM_CAST(addr));
|
||||
}
|
||||
|
||||
void ppu_interpreter::SRAW(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -2768,7 +2768,7 @@ void ppu_interpreter::LVRXL(PPUThread& CPU, ppu_opcode_t op)
|
|||
const u8 eb = addr & 0xf;
|
||||
|
||||
CPU.VPR[op.vd].clear();
|
||||
for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[op.vd]._u8[15 - i] = vm::read8(vm::cast(addr + i - 16));
|
||||
for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[op.vd]._u8[15 - i] = vm::read8(VM_CAST(addr + i - 16));
|
||||
}
|
||||
|
||||
void ppu_interpreter::DSS(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -2804,13 +2804,13 @@ void ppu_interpreter::STVLXL(PPUThread& CPU, ppu_opcode_t op)
|
|||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
const u32 eb = addr & 0xf;
|
||||
|
||||
for (u32 i = 0; i < 16u - eb; ++i) vm::write8(vm::cast(addr + i), CPU.VPR[op.vs]._u8[15 - i]);
|
||||
for (u32 i = 0; i < 16u - eb; ++i) vm::write8(VM_CAST(addr + i), CPU.VPR[op.vs]._u8[15 - i]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::STHBRX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
vm::get_ref<u16>(vm::cast(addr)) = (u16)CPU.GPR[op.rs];
|
||||
vm::get_ref<u16>(VM_CAST(addr)) = (u16)CPU.GPR[op.rs];
|
||||
}
|
||||
|
||||
void ppu_interpreter::EXTSH(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -2824,7 +2824,7 @@ void ppu_interpreter::STVRXL(PPUThread& CPU, ppu_opcode_t op)
|
|||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
const u8 eb = addr & 0xf;
|
||||
|
||||
for (u32 i = 16 - eb; i < 16; ++i) vm::write8(vm::cast(addr + i - 16), CPU.VPR[op.vs]._u8[15 - i]);
|
||||
for (u32 i = 16 - eb; i < 16; ++i) vm::write8(VM_CAST(addr + i - 16), CPU.VPR[op.vs]._u8[15 - i]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::EXTSB(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -2836,7 +2836,7 @@ void ppu_interpreter::EXTSB(PPUThread& CPU, ppu_opcode_t op)
|
|||
void ppu_interpreter::STFIWX(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
vm::write32(vm::cast(addr), (u32&)CPU.FPR[op.frs]);
|
||||
vm::write32(VM_CAST(addr), (u32&)CPU.FPR[op.frs]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::EXTSW(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -2853,97 +2853,97 @@ void ppu_interpreter::DCBZ(PPUThread& CPU, ppu_opcode_t op)
|
|||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + CPU.GPR[op.rb] : CPU.GPR[op.rb];
|
||||
|
||||
memset(vm::get_ptr<u8>(vm::cast(addr) & ~127), 0, 128);
|
||||
memset(vm::get_ptr<u8>(VM_CAST(addr) & ~127), 0, 128);
|
||||
}
|
||||
|
||||
void ppu_interpreter::LWZ(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
CPU.GPR[op.rd] = vm::read32(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::read32(VM_CAST(addr));
|
||||
}
|
||||
|
||||
void ppu_interpreter::LWZU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
CPU.GPR[op.rd] = vm::read32(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::read32(VM_CAST(addr));
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::LBZ(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
CPU.GPR[op.rd] = vm::read8(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::read8(VM_CAST(addr));
|
||||
}
|
||||
|
||||
void ppu_interpreter::LBZU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
CPU.GPR[op.rd] = vm::read8(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::read8(VM_CAST(addr));
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::STW(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
vm::write32(vm::cast(addr), (u32)CPU.GPR[op.rs]);
|
||||
vm::write32(VM_CAST(addr), (u32)CPU.GPR[op.rs]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::STWU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
vm::write32(vm::cast(addr), (u32)CPU.GPR[op.rs]);
|
||||
vm::write32(VM_CAST(addr), (u32)CPU.GPR[op.rs]);
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::STB(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
vm::write8(vm::cast(addr), (u8)CPU.GPR[op.rs]);
|
||||
vm::write8(VM_CAST(addr), (u8)CPU.GPR[op.rs]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::STBU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
vm::write8(vm::cast(addr), (u8)CPU.GPR[op.rs]);
|
||||
vm::write8(VM_CAST(addr), (u8)CPU.GPR[op.rs]);
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::LHZ(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
CPU.GPR[op.rd] = vm::read16(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::read16(VM_CAST(addr));
|
||||
}
|
||||
|
||||
void ppu_interpreter::LHZU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
CPU.GPR[op.rd] = vm::read16(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::read16(VM_CAST(addr));
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::LHA(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
CPU.GPR[op.rd] = (s64)(s16)vm::read16(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = (s64)(s16)vm::read16(VM_CAST(addr));
|
||||
}
|
||||
|
||||
void ppu_interpreter::LHAU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
CPU.GPR[op.rd] = (s64)(s16)vm::read16(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = (s64)(s16)vm::read16(VM_CAST(addr));
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::STH(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
vm::write16(vm::cast(addr), (u16)CPU.GPR[op.rs]);
|
||||
vm::write16(VM_CAST(addr), (u16)CPU.GPR[op.rs]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::STHU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
vm::write16(vm::cast(addr), (u16)CPU.GPR[op.rs]);
|
||||
vm::write16(VM_CAST(addr), (u16)CPU.GPR[op.rs]);
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
|
|
@ -2952,7 +2952,7 @@ void ppu_interpreter::LMW(PPUThread& CPU, ppu_opcode_t op)
|
|||
u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
for (u32 i = op.rd; i<32; ++i, addr += 4)
|
||||
{
|
||||
CPU.GPR[i] = vm::read32(vm::cast(addr));
|
||||
CPU.GPR[i] = vm::read32(VM_CAST(addr));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -2961,79 +2961,79 @@ void ppu_interpreter::STMW(PPUThread& CPU, ppu_opcode_t op)
|
|||
u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
for (u32 i = op.rs; i<32; ++i, addr += 4)
|
||||
{
|
||||
vm::write32(vm::cast(addr), (u32)CPU.GPR[i]);
|
||||
vm::write32(VM_CAST(addr), (u32)CPU.GPR[i]);
|
||||
}
|
||||
}
|
||||
|
||||
void ppu_interpreter::LFS(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<float>>(vm::cast(addr)).value();
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<float>>(VM_CAST(addr)).value();
|
||||
}
|
||||
|
||||
void ppu_interpreter::LFSU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<float>>(vm::cast(addr)).value();
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<float>>(VM_CAST(addr)).value();
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::LFD(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<double>>(vm::cast(addr)).value();
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<double>>(VM_CAST(addr)).value();
|
||||
}
|
||||
|
||||
void ppu_interpreter::LFDU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<double>>(vm::cast(addr)).value();
|
||||
CPU.FPR[op.frd]._double = vm::get_ref<be_t<double>>(VM_CAST(addr)).value();
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::STFS(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
vm::get_ref<be_t<float>>(vm::cast(addr)) = static_cast<float>(CPU.FPR[op.frs]);
|
||||
vm::get_ref<be_t<float>>(VM_CAST(addr)) = static_cast<float>(CPU.FPR[op.frs]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::STFSU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
vm::get_ref<be_t<float>>(vm::cast(addr)) = static_cast<float>(CPU.FPR[op.frs]);
|
||||
vm::get_ref<be_t<float>>(VM_CAST(addr)) = static_cast<float>(CPU.FPR[op.frs]);
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::STFD(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? CPU.GPR[op.ra] + op.simm16 : op.simm16;
|
||||
vm::get_ref<be_t<double>>(vm::cast(addr)) = CPU.FPR[op.frs];
|
||||
vm::get_ref<be_t<double>>(VM_CAST(addr)) = CPU.FPR[op.frs];
|
||||
}
|
||||
|
||||
void ppu_interpreter::STFDU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + op.simm16;
|
||||
vm::get_ref<be_t<double>>(vm::cast(addr)) = CPU.FPR[op.frs];
|
||||
vm::get_ref<be_t<double>>(VM_CAST(addr)) = CPU.FPR[op.frs];
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::LD(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = (op.simm16 & ~3) + (op.ra ? CPU.GPR[op.ra] : 0);
|
||||
CPU.GPR[op.rd] = vm::read64(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::read64(VM_CAST(addr));
|
||||
}
|
||||
|
||||
void ppu_interpreter::LDU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + (op.simm16 & ~3);
|
||||
CPU.GPR[op.rd] = vm::read64(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = vm::read64(VM_CAST(addr));
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
void ppu_interpreter::LWA(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = (op.simm16 & ~3) + (op.ra ? CPU.GPR[op.ra] : 0);
|
||||
CPU.GPR[op.rd] = (s64)(s32)vm::read32(vm::cast(addr));
|
||||
CPU.GPR[op.rd] = (s64)(s32)vm::read32(VM_CAST(addr));
|
||||
}
|
||||
|
||||
void ppu_interpreter::FDIVS(PPUThread& CPU, ppu_opcode_t op)
|
||||
|
|
@ -3099,13 +3099,13 @@ void ppu_interpreter::FNMADDS(PPUThread& CPU, ppu_opcode_t op)
|
|||
void ppu_interpreter::STD(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = (op.simm16 & ~3) + (op.ra ? CPU.GPR[op.ra] : 0);
|
||||
vm::write64(vm::cast(addr), CPU.GPR[op.rs]);
|
||||
vm::write64(VM_CAST(addr), CPU.GPR[op.rs]);
|
||||
}
|
||||
|
||||
void ppu_interpreter::STDU(PPUThread& CPU, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = CPU.GPR[op.ra] + (op.simm16 & ~3);
|
||||
vm::write64(vm::cast(addr), CPU.GPR[op.rs]);
|
||||
vm::write64(VM_CAST(addr), CPU.GPR[op.rs]);
|
||||
CPU.GPR[op.ra] = addr;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue