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https://github.com/RPCS3/rpcs3.git
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SPU Anlyzer: Detect RdDec pseudo-reads loops
This commit is contained in:
elad335
parent
0724fa3aa9
commit
5f017fb460
2 changed files with 425 additions and 129 deletions
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@ -69,6 +69,59 @@ struct span_less
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template <typename T>
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inline constexpr span_less<T> s_span_less{};
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// Just madness to keep some members uninitialized and get zero initialization otherwise
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template <typename T>
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struct alignas(T) un_t
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{
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std::byte data[sizeof(T)];
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T* get() noexcept
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{
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return std::launder(reinterpret_cast<T*>(+data));
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}
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const T* get() const noexcept
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{
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return std::launder(reinterpret_cast<const T*>(+data));
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}
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T& operator =(const T& r) noexcept
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{
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return *get() = r;
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}
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T* operator ->() noexcept
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{
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return get();
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}
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const T* operator ->() const noexcept
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{
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return get();
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}
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operator T&() noexcept
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{
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return *get();
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}
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operator const T&() const noexcept
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{
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return *get();
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}
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static void init(un_t& un)
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{
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new (un.data) T();
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}
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void destroy()
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{
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get()->~T();
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}
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};
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// Move 4 args for calling native function from a GHC calling convention function
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#if defined(ARCH_X64)
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static u8* move_args_ghc_to_native(u8* raw)
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@ -2557,13 +2610,13 @@ using vf = spu_recompiler_base::vf;
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bool reg_state_t::is_const() const
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{
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return !!(flag & vf::is_const);
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return !(flag & vf::is_mask) && bit_range == 0 && value_range == 1;
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}
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bool reg_state_t::compare_tags(const reg_state_t& rhs) const
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{
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// Compare by tag, address of instruction origin
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return tag == rhs.tag && origin == rhs.origin && is_instruction == rhs.is_instruction;
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// Compare by tag, address of instruction origin
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return value == rhs.value && tag == rhs.tag && origin == rhs.origin && is_instruction == rhs.is_instruction;
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}
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bool reg_state_t::operator&(vf to_test) const
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@ -2578,7 +2631,7 @@ bool reg_state_t::is_less_than(u32 imm) const
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return true;
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}
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if (~known_zeroes < imm)
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if (~get_known_zeroes() < imm)
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{
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// The highest number possible within the mask's limit is less than imm
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return true;
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@ -2589,12 +2642,12 @@ bool reg_state_t::is_less_than(u32 imm) const
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bool reg_state_t::operator==(const reg_state_t& r) const
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{
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if ((flag ^ r.flag) - (vf::is_null + vf::is_mask))
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if ((flag ^ r.flag) - (vf::is_null))
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{
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return false;
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}
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return (flag & vf::is_const ? value == r.value : (compare_tags(r) && known_ones == r.known_ones && known_zeroes == r.known_zeroes));
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return (flag.is_const() ? value == r.value : (compare_tags(r) && bit_range == r.bit_range && value_range == r.value_range));
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}
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bool reg_state_t::operator==(u32 imm) const
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@ -2610,7 +2663,7 @@ bool reg_state_t::compare_with_mask_indifference(const reg_state_t& r, u32 mask_
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return true;
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}
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if ((r.flag & flag) & vf::is_const)
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if (r.is_const() || is_const())
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{
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// Simplified path for consts
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if (((value ^ r.value) & mask_bits) == 0)
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@ -2628,8 +2681,8 @@ bool reg_state_t::compare_with_mask_indifference(const reg_state_t& r, u32 mask_
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return true;
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}
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const auto _this = this->downgrade();
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const auto _r = r.downgrade();
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const auto& _this = *this;
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const auto& _r = r;
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const bool is_mask_equal = (_this.compare_tags(_r) && _this.flag == _r.flag && !((_this.known_ones ^ _r.known_ones) & mask_bits) && !((_this.known_zeroes ^ _r.known_zeroes) & mask_bits));
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@ -2643,7 +2696,7 @@ bool reg_state_t::compare_with_mask_indifference(u32 imm, u32 mask_bits) const
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return true;
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}
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if (flag & vf::is_const)
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if (is_const())
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{
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if (((value ^ imm) & mask_bits) == 0)
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{
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@ -2662,7 +2715,7 @@ bool reg_state_t::unequal_with_mask_indifference(const reg_state_t& r, u32 mask_
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return true;
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}
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if ((r.flag & flag) & vf::is_const)
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if (r.is_const() && is_const())
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{
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// Simplified path for consts
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if ((value ^ r.value) & mask_bits)
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@ -2696,21 +2749,6 @@ bool reg_state_t::unequal_with_mask_indifference(const reg_state_t& r, u32 mask_
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return (((_this.known_ones ^ _r.known_ones) & mask_bits) & ((_this.known_zeroes ^ _r.known_zeroes) & mask_bits)) != 0;
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}
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reg_state_t reg_state_t::downgrade() const
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{
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if (flag & vf::is_const)
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{
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return reg_state_t{vf::is_mask, 0, umax, this->value, ~this->value, this->origin};
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}
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if (!(flag - vf::is_null))
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{
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return reg_state_t{vf::is_mask, 0, this->tag, 0, 0, this->origin};
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}
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return *this;
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}
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reg_state_t reg_state_t::merge(const reg_state_t& rhs, u32 current_pc) const
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{
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if (rhs == *this)
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@ -2719,18 +2757,17 @@ reg_state_t reg_state_t::merge(const reg_state_t& rhs, u32 current_pc) const
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return rhs;
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}
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if ((rhs.flag + flag).all_of(vf::is_const + vf::is_mask))
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if ((rhs.bit_range | bit_range) != umax)
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{
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// Try to downgrade to a known-bits type value
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const reg_state_t _rhs = rhs.downgrade();
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const reg_state_t _this = this->downgrade();
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const reg_state_t& _rhs = rhs;
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const reg_state_t& _this = *this;
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if ((_rhs.flag & _this.flag) & vf::is_mask)
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{
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// Now it is possible to merge the two values
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reg_state_t res{vf::is_mask, 0, 0, _rhs.known_ones & _this.known_ones, _rhs.known_zeroes & _this.known_zeroes};
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reg_state_t res{{}, 0, 0, _rhs.known_ones & _this.known_ones, _rhs.known_zeroes & _this.known_zeroes};
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if (res.known_zeroes | res.known_ones)
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if (res.bit_range != umax)
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{
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// Success (create new value tag)
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res.tag = reg_state_t::alloc_tag();
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@ -2763,23 +2800,13 @@ reg_state_t reg_state_t::build_on_top_of(const reg_state_t& rhs) const
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u32 reg_state_t::get_known_zeroes() const
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{
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if (flag & vf::is_const)
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{
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return ~value;
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}
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return known_zeroes;
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return (~value) & ~bit_range;
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}
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u32 reg_state_t::get_known_ones() const
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{
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if (flag & vf::is_const)
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{
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return value;
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}
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return known_ones;
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return value & ~bit_range;
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}
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reg_state_t reg_state_t::from_value(u32 value) noexcept
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@ -3009,7 +3036,9 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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}
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// Analyse instruction
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switch (const auto type = g_spu_itype.decode(data))
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const auto type = g_spu_itype.decode(data);
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switch (type)
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{
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case spu_itype::UNK:
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case spu_itype::DFCEQ:
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@ -4248,7 +4277,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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{
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if (tb.chunk == block.chunk && tb.reg_origin[i] + 1)
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{
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const u32 expected = block.reg_mod[i] ? addr : block.reg_origin[i];
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const u32 expected = block.reg_origin[i] == umax || block.reg_mod[i] ? addr : block.reg_origin[i];
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if (tb.reg_origin[i] == 0x80000000)
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{
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@ -4838,19 +4867,148 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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return map;
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};
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struct putllc16_statistics_t
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struct break_stats_t
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{
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atomic_t<u64> all = 0;
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atomic_t<u64> single = 0;
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atomic_t<u64> nowrite = 0;
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std::array<atomic_t<u64>, 128> breaking_reason{};
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};
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struct rchcnt_statistics_t
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struct putllc16_statistics_t : break_stats_t
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{
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atomic_t<u64> all = 0;
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atomic_t<u64> single = 0;
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std::array<atomic_t<u64>, 128> breaking_reason{};
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atomic_t<u64> nowrite = 0;
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};
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struct rchcnt_statistics_t : break_stats_t
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{
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};
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struct rddec_statistics_t : break_stats_t
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{
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};
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struct alignas(u8) masked_regs_t
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{
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u8 mask[s_reg_max / 8]{};
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masked_regs_t() noexcept = default;
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explicit masked_regs_t(int) noexcept
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{
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for (u32 i = 0; i < s_reg_max / 8; i++)
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{
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mask[i] = umax;
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}
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}
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bool test(usz index) const noexcept
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{
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return (mask[index / 8] >> (index % 8)) % 2 != 0;
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}
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bool test_and_set(usz index) noexcept
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{
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const u64 or_mask = (1ull << (index % 8));
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const u64 old = mask[index / 8];
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mask[index / 8] |= or_mask;
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return (mask[index / 9] & or_mask) != 0;
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}
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masked_regs_t join(const masked_regs_t& rhs)
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{
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masked_regs_t result = *this;
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for (u32 i = 0; i < s_reg_max / 8; i++)
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{
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result.mask[i] |= rhs.mask[i];
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}
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return result;
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}
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void init()
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{
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*this = {};
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}
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};
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struct masked_reg_state_t : masked_regs_t
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{
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std::array<un_t<reg_state_t>, s_reg_max> state;
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reg_state_t& get(usz index) noexcept
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{
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if (!test_and_set(index))
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{
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state[index]->init();
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}
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return state[index];
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}
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const reg_state_t& get(usz index) const noexcept
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{
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ensure(test(index));
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return state[index];
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}
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reg_state_t& get(usz index) noexcept
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{
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ensure(test(index));
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return state[index];
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}
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template <typename Func>
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auto compare_known(const masked_reg_state_t& rhs, Func& func)
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{
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for (int i = 0; i < s_reg_mask; i++)
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{
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if (test(i) && rhs.test(i))
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{
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const reg_state_t& a = get(i);
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const reg_state_t& b = rhs.get(i);
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if (func(a, b))
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{
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return;
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}
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}
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}
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}
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};
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struct masked_reg_origin_t : masked_regs_t
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{
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usz count_tracked = 0;
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u8 tracked_names[32]{};
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std::array<un_t<masked_regs_t>, 32> tracked_regs;
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masked_regs_t reg_unk{1};
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masked_regs_t& get(u8 index) const noexcept
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{
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for (u32 i = 0; i < count_tracked; i++)
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{
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if (tracked_names[i] == index)
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{
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return *tracked_regs[i];
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}
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}
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if (count_tracked < std::size(tracked_names))
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{
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auto& ptr = tracked_regs[count_tracked++];
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ptr->init();
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return *ptr;
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}
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return reg_unk;
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// // const v128 p1 = v128::loadu(tracked_regs, 0);
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// // const v128 p2 = v128::loadu(tracked_regs, 1);
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// // const v128 pindex = v128::from8p(index);
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// // gv_eq8(p1,)
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// return state[index];
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}
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};
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// Pattern structures
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@ -4932,6 +5090,13 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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}
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};
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struct rddec_noop_loop_t
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{
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bool active = false;
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u32 read_pc = SPU_LS_SIZE; // PC of RDCH (that encloses the loop)
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masked_reg_state_t current_state;
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};
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// Reset tags
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reg_state_t::alloc_tag(true);
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@ -4954,6 +5119,9 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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// RDCH/RCHCNT Loop analysis tracker
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rchcnt_loop_t rchcnt_loop{};
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// RdDec (RDCH) Loop analysis tracker
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rddec_noop_loop_t rddec_loop{};
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block_reg_state_iterator(u32 _pc, usz _parent_iterator_index = umax, usz _parent_target_index = 0) noexcept
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: pc(_pc)
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, parent_iterator_index(_parent_iterator_index)
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@ -4964,8 +5132,11 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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std::vector<block_reg_state_iterator> reg_state_it;
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std::map<u32, atomic16_t> atomic16_all; // RdAtomicStat location -> atomic loop optimization state
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std::map<u32, rchcnt_loop_t> rchcnt_loop_all; // RDCH/RCHCNT location -> channel read loop optimization state
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auto_typemap<spu_recompiler_base> pattern_map;
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auto& atomic16_all = pattern_map.get<std::map<u32, atomic16_t>>(); // RdAtomicStat location -> atomic loop optimization state
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auto& rchcnt_loop_all = pattern_map.get<std::map<u32, rchcnt_loop_t>>(); // RDCH/RCHCNT location -> channel read loop optimization state
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auto& rddec_noop_loop_all = pattern_map.get<std::map<u32, rddec_noop_loop_t>>(); // RDCH/RCHCNT location -> channel read loop optimization state
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std::map<u32, bool> getllar_starts; // True for failed loops
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std::map<u32, bool> run_on_block;
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std::map<u32, bool> logged_block;
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@ -4973,7 +5144,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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std::array<reg_state_t, s_reg_max>* true_state_walkby = nullptr;
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atomic16_t dummy16{};
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rchcnt_loop_t dummy_loop{};
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rchcnt_loop_t dummy_rdcnt{};
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rddec_noop_loop_t dummy_rddec{};
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bool likely_putllc_loop = false;
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bool had_putllc_evaluation = false;
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@ -5087,7 +5259,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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auto& vregs = is_form_block ? infos[bpc]->local_state : *true_state_walkby;
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const auto atomic16 = is_pattern_match ? &::at32(reg_state_it, wi).atomic16 : &dummy16;
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const auto rchcnt_loop = is_pattern_match ? &::at32(reg_state_it, wi).rchcnt_loop : &dummy_loop;
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const auto rchcnt_loop = is_pattern_match ? &::at32(reg_state_it, wi).rchcnt_loop : &dummy_rdcnt;
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const auto rddec_loop = is_pattern_match ? &::at32(reg_state_it, wi).rddec_loop : &dummy_rddec;
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const u32 pos = wa;
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@ -5152,27 +5325,29 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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}
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};
|
||||
|
||||
const auto break_channel_pattern = [&](u32 cause, rchcnt_loop_t previous)
|
||||
const auto break_a_pattern = <typename BreakT, typename Stats>[&](u32 cause, BreakT previous, std::string_view pattern_name)
|
||||
{
|
||||
if (previous.active && rchcnt_loop_all.contains(previous.read_pc))
|
||||
auto& all_patterns = pattern_map.get<std::map<u32, BreakT>>();
|
||||
|
||||
if (previous.active && all_patterns.contains(previous.read_pc))
|
||||
{
|
||||
const bool is_first = !std::exchange(rchcnt_loop_all[previous.read_pc].failed, true);
|
||||
const bool is_first = !std::exchange(all_patterns[previous.read_pc].failed, true);
|
||||
|
||||
if (!is_first)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
g_fxo->get<rchcnt_statistics_t>().breaking_reason[cause]++;
|
||||
g_fxo->get<Stats>().breaking_reason[cause]++;
|
||||
|
||||
if (!spu_log.notice)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
std::string break_error = fmt::format("Channel pattern breakage [%x cause=%u] (read_pc=0x%x)", pos, cause, previous.read_pc);
|
||||
std::string break_error = fmt::format("%s pattern breakage [%x cause=%u] (read_pc=0x%x)", pattern_name, pos, cause, previous.read_pc);
|
||||
|
||||
const auto values = sort_breakig_reasons(g_fxo->get<rchcnt_statistics_t>().breaking_reason);
|
||||
const auto values = sort_breakig_reasons(g_fxo->get<Stats>().breaking_reason);
|
||||
|
||||
std::string tracing = "Top Breaking Reasons:";
|
||||
|
||||
|
|
@ -5209,10 +5384,21 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
}
|
||||
};
|
||||
|
||||
const auto break_channel_pattern = [&](u32 cause)
|
||||
{
|
||||
break_a_pattern(cause, rchcnt_loop->discard(), "Channel");
|
||||
};
|
||||
|
||||
const auto break_rddec_pattern = [&](u32 cause)
|
||||
{
|
||||
break_a_pattern(cause, rddec_loop->discard(), "RdDec");
|
||||
};
|
||||
|
||||
const auto break_all_patterns = [&](u32 cause)
|
||||
{
|
||||
break_putllc16(cause, atomic16->discard());
|
||||
break_channel_pattern(cause, rchcnt_loop->discard());
|
||||
break_rddec_pattern(cause, rddec_loop->discard());
|
||||
};
|
||||
|
||||
const auto calculate_absolute_ls_difference = [](u32 addr1, u32 addr2)
|
||||
|
|
@ -5502,6 +5688,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
// Backup analyser information
|
||||
const auto atomic16_info = reg_state_it[stackframe_it].atomic16;
|
||||
const auto rchcnt_loop_info = reg_state_it[stackframe_it].rchcnt_loop;
|
||||
const auto rddec_loop_info = reg_state_it[stackframe_it].rddec_loop;
|
||||
|
||||
// Clean from the back possible because it does not affect old indices
|
||||
// Technically should always do a full cleanup at the moment
|
||||
|
|
@ -5531,6 +5718,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
{
|
||||
// Restore analyser information (if not an entry)
|
||||
next.atomic16 = atomic16_info;
|
||||
next.rddec_loop = rchcnt_loop_info;
|
||||
|
||||
if (previous_pc != rchcnt_loop_info.branch_pc || target_pc == rchcnt_loop_info.branch_target)
|
||||
next.rchcnt_loop = rchcnt_loop_info;
|
||||
|
|
@ -5549,6 +5737,14 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
pair.failed = true;
|
||||
pair.active = false;
|
||||
}
|
||||
|
||||
if (rddec_loop_info.active)
|
||||
{
|
||||
// Does not post-dominates channel read
|
||||
auto& pair = rddec_noop_loop_all[rddec_loop_info.read_pc];
|
||||
pair.failed = true;
|
||||
pair.active = false;
|
||||
}
|
||||
}
|
||||
|
||||
next.iterator_id = iterator_id_alloc++;
|
||||
|
|
@ -5635,18 +5831,18 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
return;
|
||||
}
|
||||
|
||||
const u32 ones = (state.known_ones | mask_ones) & ~mask_zeroes;
|
||||
const u32 ones = (state.get_known_ones() | mask_ones) & ~mask_zeroes;
|
||||
const u32 zeroes = (state.known_zeroes | mask_zeroes) & ~mask_ones;
|
||||
|
||||
if ((ones ^ zeroes) == umax)
|
||||
{
|
||||
// Special case: create a constant from full masks
|
||||
vregs[reg] = reg_state_t::from_value(ones);
|
||||
return;
|
||||
}
|
||||
|
||||
const u32 new_value = (state.value | ones) & ~zeroes;
|
||||
const u32 bit_mask = state.bit_range & ~(ones | zeroes);
|
||||
|
||||
ensure(state.tag != umax);
|
||||
vregs[reg] = reg_state_t{vf::is_mask, 0, state.tag, ones, zeroes, state.origin};
|
||||
vregs[reg].origin = state.origin;
|
||||
vregs[reg].bit_range = bit_mask;
|
||||
vregs[reg].value = state.value;
|
||||
vregs[reg].tag = state.tag;
|
||||
};
|
||||
|
||||
const auto unconst = [&](u32 reg, u32 pc)
|
||||
|
|
@ -5714,6 +5910,14 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
}
|
||||
}
|
||||
|
||||
auto emplace_origin = [&](std::vector<u32>& origins, u32 origin)
|
||||
{
|
||||
if (!std::count(origins.begin(), origins.end(), pos))
|
||||
{
|
||||
origins.emplace_back(origin);
|
||||
}
|
||||
};
|
||||
|
||||
if (rchcnt_loop->active)
|
||||
{
|
||||
if (std::find(rchcnt_loop->origins.begin(), rchcnt_loop->origins.end(), pos) != rchcnt_loop->origins.end())
|
||||
|
|
@ -5780,6 +5984,77 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
spu_log.always()("[SPU=0%x, it=%d] %s%s [%d]", pos, reg_state_it[wi].iterator_id, dis_asm.last_opcode, consts, atomic16->active);
|
||||
}
|
||||
|
||||
// Make unknown value
|
||||
const reg_state_t* ra_state = nullptr;
|
||||
const reg_state_t* rb_state = nullptr;
|
||||
const reg_state_t* rc_state = nullptr;
|
||||
reg_state_t reg_saved_state;
|
||||
{
|
||||
u32 ra = s_reg_max, rb = s_reg_max, rc = s_reg_max;
|
||||
|
||||
if (m_use_ra.test(pos / 4))
|
||||
{
|
||||
ra = op.ra;
|
||||
ra_state = &vregs[op.ra];
|
||||
}
|
||||
|
||||
if (m_use_rb.test(pos / 4))
|
||||
{
|
||||
rb = op.rb;
|
||||
rb_state = &vregs[op.rb];
|
||||
}
|
||||
|
||||
if (type & spu_itype::_quadrop && m_use_rc.test(pos / 4))
|
||||
{
|
||||
rc = op.rc;
|
||||
rc_state = &vregs[op.rc];
|
||||
}
|
||||
|
||||
if (!(type & spu_itype::zregmod))
|
||||
{
|
||||
const u32 op_rt = type & spu_itype::_quadrop ? +op.rt4 : +op.rt;
|
||||
|
||||
if (op_rt == ra)
|
||||
{
|
||||
reg_saved_state = *ra_state;
|
||||
ra_state = ®_saved_state;
|
||||
}
|
||||
|
||||
if (op_rt == rb)
|
||||
{
|
||||
reg_saved_state = *rb_state;
|
||||
rb_state = ®_saved_state;
|
||||
}
|
||||
|
||||
if (op_rt == rc)
|
||||
{
|
||||
reg_saved_state = *rc_state;
|
||||
rc_state = ®_saved_state;
|
||||
}
|
||||
|
||||
masked_regs_t dest{};
|
||||
|
||||
if (ra != s_reg_max)
|
||||
{
|
||||
dest = dest.join(loop->current_state.get(ra));
|
||||
}
|
||||
|
||||
if (rb != s_reg_max)
|
||||
{
|
||||
dest = dest.join(loop->current_state.get(rb));
|
||||
}
|
||||
|
||||
if (rc != s_reg_max)
|
||||
{
|
||||
rddec_loop->current_state.get(op_rt) = dest.join(loop->current_state.get(rc));
|
||||
}
|
||||
else
|
||||
{
|
||||
rddec_loop->current_state.get(op_rt) = dest;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Analyse instruction
|
||||
switch (type)
|
||||
{
|
||||
|
|
@ -6167,20 +6442,21 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
const bool is_read = type == spu_itype::RDCH;
|
||||
bool invalidate = true;
|
||||
|
||||
const auto it = rchcnt_loop_all.find(pos);
|
||||
const auto cntit = rchcnt_loop_all.find(pos);
|
||||
const auto decit = rchcnt_loop_all.find(pos);
|
||||
|
||||
if (it != rchcnt_loop_all.end())
|
||||
if (cntit != rchcnt_loop_all.end())
|
||||
{
|
||||
if (rchcnt_loop->failed || !rchcnt_loop->conditioned || rchcnt_loop->read_pc != pos)
|
||||
{
|
||||
// Propagate faiure
|
||||
it->second.failed = true;
|
||||
it->second.active = false;
|
||||
it->second.conditioned = false;
|
||||
cntit->second.failed = true;
|
||||
cntit->second.active = false;
|
||||
cntit->second.conditioned = false;
|
||||
}
|
||||
else
|
||||
{
|
||||
it->second.active = false;
|
||||
cntit->second.active = false;
|
||||
}
|
||||
|
||||
rchcnt_loop->active = false;
|
||||
|
|
@ -6194,6 +6470,31 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
}
|
||||
}
|
||||
|
||||
if (decit != rddec_noop_loop_all.end())
|
||||
{
|
||||
if (rddec_loop->failed || !rddec_loop->conditioned || rddec_loop->read_pc != pos)
|
||||
{
|
||||
// Propagate faiure
|
||||
decit->second.failed = true;
|
||||
decit->second.active = false;
|
||||
decit->second.conditioned = false;
|
||||
}
|
||||
else
|
||||
{
|
||||
decit->second.active = false;
|
||||
}
|
||||
|
||||
rddec_loop->active = false;
|
||||
}
|
||||
|
||||
if (rddec_loop->active)
|
||||
{
|
||||
if (rddec_loop->read_pc != pos)
|
||||
{
|
||||
break_channel_pattern(53, rddec_loop->discard());
|
||||
}
|
||||
}
|
||||
|
||||
switch (op.ra)
|
||||
{
|
||||
case MFC_RdAtomicStat:
|
||||
|
|
@ -6733,7 +7034,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
{
|
||||
hbr_loc = spu_branch_target(pos, op.roh << 7 | op.rt);
|
||||
const auto [af, av, at, ao, az, apc, ainst] = get_reg(op.ra);
|
||||
hbr_tg = af & vf::is_const && !op.c ? av & 0x3fffc : -1;
|
||||
hbr_tg = af.is_const() && !op.c ? av & 0x3fffc : -1;
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -7040,65 +7341,62 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
|||
}
|
||||
default:
|
||||
{
|
||||
// Make unknown value
|
||||
if (!(type & spu_itype::zregmod))
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
// Make unknown value
|
||||
if (!(type & spu_itype::zregmod))
|
||||
{
|
||||
const u32 op_rt = type & spu_itype::_quadrop ? +op.rt4 : +op.rt;
|
||||
|
||||
u32 ra = s_reg_max, rb = s_reg_max, rc = s_reg_max;
|
||||
|
||||
if (m_use_ra.test(pos / 4))
|
||||
{
|
||||
const u32 op_rt = type & spu_itype::_quadrop ? +op.rt4 : +op.rt;
|
||||
ra = op.ra;
|
||||
}
|
||||
|
||||
u32 ra = s_reg_max, rb = s_reg_max, rc = s_reg_max;
|
||||
if (m_use_rb.test(pos / 4))
|
||||
{
|
||||
rb = op.rb;
|
||||
}
|
||||
|
||||
if (m_use_ra.test(pos / 4))
|
||||
if (type & spu_itype::_quadrop && m_use_rc.test(pos / 4))
|
||||
{
|
||||
rc = op.rc;
|
||||
}
|
||||
|
||||
u32 reg_pos = SPU_LS_SIZE;
|
||||
|
||||
for (u32 reg : {ra, rb, rc})
|
||||
{
|
||||
if (reg != s_reg_max)
|
||||
{
|
||||
ra = op.ra;
|
||||
}
|
||||
|
||||
if (m_use_rb.test(pos / 4))
|
||||
{
|
||||
rb = op.rb;
|
||||
}
|
||||
|
||||
if (type & spu_itype::_quadrop && m_use_rc.test(pos / 4))
|
||||
{
|
||||
rc = op.rc;
|
||||
}
|
||||
|
||||
u32 reg_pos = SPU_LS_SIZE;
|
||||
|
||||
for (u32 reg : {ra, rb, rc})
|
||||
{
|
||||
if (reg != s_reg_max)
|
||||
if (reg_pos == SPU_LS_SIZE)
|
||||
{
|
||||
if (reg_pos == SPU_LS_SIZE)
|
||||
{
|
||||
reg = vregs[reg].origin;
|
||||
}
|
||||
else if (reg_pos != vregs[reg].origin)
|
||||
{
|
||||
const u32 block_start = reg_state_it[wi].pc;
|
||||
|
||||
// if (vregs[reg].origin >= block_start && vregs[reg].origin <= pos)
|
||||
// {
|
||||
// reg_pos = std::max<u32>(vregs[reg].origin, reg_pos);
|
||||
// }
|
||||
reg_pos = block_start;
|
||||
break;
|
||||
}
|
||||
reg = vregs[reg].origin;
|
||||
}
|
||||
}
|
||||
|
||||
unconst(op_rt, reg_pos == SPU_LS_SIZE ? pos : reg_pos);
|
||||
|
||||
if (rchcnt_loop->active)
|
||||
{
|
||||
if (std::find(rchcnt_loop->origins.begin(), rchcnt_loop->origins.end(), vregs[op_rt].origin) == rchcnt_loop->origins.end())
|
||||
else if (reg_pos != vregs[reg].origin)
|
||||
{
|
||||
rchcnt_loop->origins.push_back(vregs[op_rt].origin);
|
||||
const u32 block_start = reg_state_it[wi].pc;
|
||||
|
||||
// if (vregs[reg].origin >= block_start && vregs[reg].origin <= pos)
|
||||
// {
|
||||
// reg_pos = std::max<u32>(vregs[reg].origin, reg_pos);
|
||||
// }
|
||||
reg_pos = block_start;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
unconst(op_rt, reg_pos == SPU_LS_SIZE ? pos : reg_pos);
|
||||
|
||||
if (rchcnt_loop->active)
|
||||
{
|
||||
emplace_origin(rchcnt_loop->origins, vregs[op_rt].origin);
|
||||
}
|
||||
}
|
||||
|
||||
if (m_targets.count(pos))
|
||||
|
|
|
|||
|
|
@ -193,9 +193,7 @@ public:
|
|||
// Value flags (TODO: only is_const is implemented)
|
||||
enum class vf : u32
|
||||
{
|
||||
is_const,
|
||||
is_mask,
|
||||
is_rel,
|
||||
is_null,
|
||||
|
||||
__bitset_enum_max
|
||||
|
|
@ -206,8 +204,8 @@ public:
|
|||
bs_t<vf> flag{+vf::is_null};
|
||||
u32 value{};
|
||||
u32 tag = umax;
|
||||
u32 known_ones{};
|
||||
u32 known_zeroes{};
|
||||
u32 value_range = 0;
|
||||
u32 bit_range = umax;
|
||||
u32 origin = SPU_LS_SIZE;
|
||||
bool is_instruction = false;
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue