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https://github.com/RPCS3/rpcs3.git
synced 2025-07-12 01:38:37 +12:00
Implement cpu_thread::suspend_all
Remove Accurate PUTLLC option. Implement fallback path for SPU transactions.
This commit is contained in:
Nekotekina
parent
17d0dcb7a2
commit
5d45a3e47d
18 changed files with 843 additions and 362 deletions
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@ -5125,34 +5125,30 @@ public:
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call("spu_unknown", &exec_unk, m_thread, m_ir->getInt32(op_unk.opcode));
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}
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static bool exec_stop(spu_thread* _spu, u32 code)
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static void exec_stop(spu_thread* _spu, u32 code)
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{
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return _spu->stop_and_signal(code);
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if (!_spu->stop_and_signal(code))
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{
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spu_runtime::g_escape(_spu);
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}
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if (_spu->test_stopped())
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{
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_spu->pc += 4;
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spu_runtime::g_escape(_spu);
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}
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}
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void STOP(spu_opcode_t op) //
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{
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if (m_interp_magn)
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{
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const auto succ = call("spu_syscall", &exec_stop, m_thread, m_ir->CreateAnd(m_interp_op, m_ir->getInt32(0x3fff)));
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const auto next = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto stop = llvm::BasicBlock::Create(m_context, "", m_function);
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m_ir->CreateCondBr(succ, next, stop);
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m_ir->SetInsertPoint(stop);
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m_ir->CreateRetVoid();
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m_ir->SetInsertPoint(next);
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call("spu_syscall", &exec_stop, m_thread, m_ir->CreateAnd(m_interp_op, m_ir->getInt32(0x3fff)));
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return;
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}
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update_pc();
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const auto succ = call("spu_syscall", &exec_stop, m_thread, m_ir->getInt32(op.opcode & 0x3fff));
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const auto next = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto stop = llvm::BasicBlock::Create(m_context, "", m_function);
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m_ir->CreateCondBr(succ, next, stop);
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m_ir->SetInsertPoint(stop);
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m_ir->CreateStore(m_ir->getFalse(), m_fake_global1, true);
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m_ir->CreateBr(next);
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m_ir->SetInsertPoint(next);
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call("spu_syscall", &exec_stop, m_thread, m_ir->getInt32(op.opcode & 0x3fff));
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if (g_cfg.core.spu_block_size == spu_block_size_type::safe)
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{
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@ -5167,28 +5163,35 @@ public:
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{
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if (m_interp_magn)
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{
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const auto succ = call("spu_syscall", &exec_stop, m_thread, m_ir->getInt32(0x3fff));
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const auto next = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto stop = llvm::BasicBlock::Create(m_context, "", m_function);
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m_ir->CreateCondBr(succ, next, stop);
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m_ir->SetInsertPoint(stop);
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m_ir->CreateRetVoid();
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m_ir->SetInsertPoint(next);
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call("spu_syscall", &exec_stop, m_thread, m_ir->getInt32(0x3fff));
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return;
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}
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STOP(spu_opcode_t{0x3fff});
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}
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static s64 exec_rdch(spu_thread* _spu, u32 ch)
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static u32 exec_rdch(spu_thread* _spu, u32 ch)
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{
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return _spu->get_ch_value(ch);
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const s64 result = _spu->get_ch_value(ch);
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if (result < 0)
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{
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spu_runtime::g_escape(_spu);
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}
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if (_spu->test_stopped())
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{
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_spu->pc += 4;
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spu_runtime::g_escape(_spu);
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}
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return static_cast<u32>(result & 0xffffffff);
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}
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static s64 exec_read_in_mbox(spu_thread* _spu)
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static u32 exec_read_in_mbox(spu_thread* _spu)
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{
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// TODO
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return _spu->get_ch_value(SPU_RdInMbox);
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return exec_rdch(_spu, SPU_RdInMbox);
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}
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static u32 exec_read_dec(spu_thread* _spu)
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@ -5203,7 +5206,7 @@ public:
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return res;
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}
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static s64 exec_read_events(spu_thread* _spu)
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static u32 exec_read_events(spu_thread* _spu)
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{
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if (const u32 events = _spu->get_events())
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{
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@ -5211,7 +5214,7 @@ public:
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}
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// TODO
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return _spu->get_ch_value(SPU_RdEventStat);
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return exec_rdch(_spu, SPU_RdEventStat);
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}
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llvm::Value* get_rdch(spu_opcode_t op, u32 off, bool atomic)
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@ -5234,20 +5237,17 @@ public:
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const auto _cur = m_ir->GetInsertBlock();
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const auto done = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto wait = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto stop = llvm::BasicBlock::Create(m_context, "", m_function);
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m_ir->CreateCondBr(m_ir->CreateICmpSLT(val0, m_ir->getInt64(0)), done, wait);
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const auto cond = m_ir->CreateICmpSLT(val0, m_ir->getInt64(0));
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val0 = m_ir->CreateTrunc(val0, get_type<u32>());
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m_ir->CreateCondBr(cond, done, wait);
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m_ir->SetInsertPoint(wait);
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const auto val1 = call("spu_read_channel", &exec_rdch, m_thread, m_ir->getInt32(op.ra));
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m_ir->CreateCondBr(m_ir->CreateICmpSLT(val1, m_ir->getInt64(0)), stop, done);
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m_ir->SetInsertPoint(stop);
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m_ir->CreateStore(m_ir->getFalse(), m_fake_global1, true);
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m_ir->CreateBr(done);
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m_ir->SetInsertPoint(done);
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const auto rval = m_ir->CreatePHI(get_type<u64>(), 2);
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const auto rval = m_ir->CreatePHI(get_type<u32>(), 2);
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rval->addIncoming(val0, _cur);
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rval->addIncoming(val1, wait);
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rval->addIncoming(m_ir->getInt64(0), stop);
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return m_ir->CreateTrunc(rval, get_type<u32>());
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return rval;
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}
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void RDCH(spu_opcode_t op) //
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@ -5257,13 +5257,6 @@ public:
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if (m_interp_magn)
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{
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res.value = call("spu_read_channel", &exec_rdch, m_thread, get_imm<u32>(op.ra).value);
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const auto next = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto stop = llvm::BasicBlock::Create(m_context, "", m_function);
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m_ir->CreateCondBr(m_ir->CreateICmpSLT(res.value, m_ir->getInt64(0)), stop, next);
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m_ir->SetInsertPoint(stop);
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m_ir->CreateRetVoid();
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m_ir->SetInsertPoint(next);
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res.value = m_ir->CreateTrunc(res.value, get_type<u32>());
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set_vr(op.rt, insert(splat<u32[4]>(0), 3, res));
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return;
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}
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@ -5279,14 +5272,6 @@ public:
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{
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update_pc();
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res.value = call("spu_read_in_mbox", &exec_read_in_mbox, m_thread);
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const auto next = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto stop = llvm::BasicBlock::Create(m_context, "", m_function);
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m_ir->CreateCondBr(m_ir->CreateICmpSLT(res.value, m_ir->getInt64(0)), stop, next);
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m_ir->SetInsertPoint(stop);
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m_ir->CreateStore(m_ir->getFalse(), m_fake_global1, true);
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m_ir->CreateBr(next);
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m_ir->SetInsertPoint(next);
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res.value = m_ir->CreateTrunc(res.value, get_type<u32>());
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break;
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}
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case MFC_RdTagStat:
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@ -5333,14 +5318,6 @@ public:
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{
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update_pc();
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res.value = call("spu_read_events", &exec_read_events, m_thread);
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const auto next = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto stop = llvm::BasicBlock::Create(m_context, "", m_function);
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m_ir->CreateCondBr(m_ir->CreateICmpSLT(res.value, m_ir->getInt64(0)), stop, next);
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m_ir->SetInsertPoint(stop);
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m_ir->CreateStore(m_ir->getFalse(), m_fake_global1, true);
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m_ir->CreateBr(next);
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m_ir->SetInsertPoint(next);
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res.value = m_ir->CreateTrunc(res.value, get_type<u32>());
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break;
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}
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case SPU_RdMachStat:
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@ -5353,14 +5330,6 @@ public:
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{
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update_pc();
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res.value = call("spu_read_channel", &exec_rdch, m_thread, m_ir->getInt32(op.ra));
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const auto next = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto stop = llvm::BasicBlock::Create(m_context, "", m_function);
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m_ir->CreateCondBr(m_ir->CreateICmpSLT(res.value, m_ir->getInt64(0)), stop, next);
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m_ir->SetInsertPoint(stop);
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m_ir->CreateStore(m_ir->getFalse(), m_fake_global1, true);
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m_ir->CreateBr(next);
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m_ir->SetInsertPoint(next);
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res.value = m_ir->CreateTrunc(res.value, get_type<u32>());
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break;
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}
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}
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@ -5471,14 +5440,18 @@ public:
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set_vr(op.rt, insert(splat<u32[4]>(0), 3, res));
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}
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static bool exec_wrch(spu_thread* _spu, u32 ch, u32 value)
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static void exec_wrch(spu_thread* _spu, u32 ch, u32 value)
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{
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return _spu->set_ch_value(ch, value);
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}
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if (!_spu->set_ch_value(ch, value))
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{
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spu_runtime::g_escape(_spu);
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}
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static void exec_mfc(spu_thread* _spu)
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{
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return _spu->do_mfc();
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if (_spu->test_stopped())
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{
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_spu->pc += 4;
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spu_runtime::g_escape(_spu);
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}
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}
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static void exec_list_unstall(spu_thread* _spu, u32 tag)
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@ -5491,12 +5464,21 @@ public:
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}
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}
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return exec_mfc(_spu);
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_spu->do_mfc();
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}
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static bool exec_mfc_cmd(spu_thread* _spu)
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static void exec_mfc_cmd(spu_thread* _spu)
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{
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return _spu->process_mfc_cmd();
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if (!_spu->process_mfc_cmd())
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{
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spu_runtime::g_escape(_spu);
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}
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if (_spu->test_stopped())
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{
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_spu->pc += 4;
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spu_runtime::g_escape(_spu);
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}
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}
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void WRCH(spu_opcode_t op) //
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@ -5505,13 +5487,7 @@ public:
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if (m_interp_magn)
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{
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const auto succ = call("spu_write_channel", &exec_wrch, m_thread, get_imm<u32>(op.ra).value, val.value);
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const auto next = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto stop = llvm::BasicBlock::Create(m_context, "", m_function);
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m_ir->CreateCondBr(succ, next, stop);
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m_ir->SetInsertPoint(stop);
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m_ir->CreateRetVoid();
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m_ir->SetInsertPoint(next);
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call("spu_write_channel", &exec_wrch, m_thread, get_imm<u32>(op.ra).value, val.value);
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return;
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}
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@ -5922,14 +5898,7 @@ public:
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}
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update_pc();
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const auto succ = call("spu_write_channel", &exec_wrch, m_thread, m_ir->getInt32(op.ra), val.value);
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const auto next = llvm::BasicBlock::Create(m_context, "", m_function);
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const auto stop = llvm::BasicBlock::Create(m_context, "", m_function);
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m_ir->CreateCondBr(succ, next, stop);
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m_ir->SetInsertPoint(stop);
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m_ir->CreateStore(m_ir->getFalse(), m_fake_global1, true);
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m_ir->CreateBr(next);
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m_ir->SetInsertPoint(next);
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call("spu_write_channel", &exec_wrch, m_thread, m_ir->getInt32(op.ra), val.value);
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}
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void LNOP(spu_opcode_t op) //
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