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rsx/common/d3d12: Use m_texture_dirty[i] to signal texture state change and avoid unecessary bind operation.
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1f7a1e4078
commit
4efa2266e6
6 changed files with 53 additions and 26 deletions
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@ -287,6 +287,15 @@ namespace rsx
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{
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rsx->m_rtts_dirty = true;
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}
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template<u32 index>
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struct set_texture_dirty_bit
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{
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force_inline static void impl(thread* rsx, u32 arg)
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{
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rsx->m_textures_dirty[index] = true;
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}
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};
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}
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namespace nv308a
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@ -834,6 +843,16 @@ namespace rsx
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bind<NV4097_SET_CONTEXT_DMA_COLOR_D, nv4097::set_surface_dirty_bit>();
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bind<NV4097_SET_CONTEXT_DMA_ZETA, nv4097::set_surface_dirty_bit>();
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bind<NV4097_SET_SURFACE_FORMAT, nv4097::set_surface_dirty_bit>();
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bind_range<NV4097_SET_TEXTURE_OFFSET, 8, 16, nv4097::set_texture_dirty_bit>();
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bind_range<NV4097_SET_TEXTURE_FORMAT, 8, 16, nv4097::set_texture_dirty_bit>();
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bind_range<NV4097_SET_TEXTURE_ADDRESS, 8, 16, nv4097::set_texture_dirty_bit>();
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bind_range<NV4097_SET_TEXTURE_CONTROL0, 8, 16, nv4097::set_texture_dirty_bit>();
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bind_range<NV4097_SET_TEXTURE_CONTROL1, 8, 16, nv4097::set_texture_dirty_bit>();
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bind_range<NV4097_SET_TEXTURE_CONTROL2, 8, 16, nv4097::set_texture_dirty_bit>();
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bind_range<NV4097_SET_TEXTURE_CONTROL3, 1, 16, nv4097::set_texture_dirty_bit>();
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bind_range<NV4097_SET_TEXTURE_FILTER, 8, 16, nv4097::set_texture_dirty_bit>();
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bind_range<NV4097_SET_TEXTURE_IMAGE_RECT, 8, 16, nv4097::set_texture_dirty_bit>();
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bind_range<NV4097_SET_TEXTURE_BORDER_COLOR, 8, 16, nv4097::set_texture_dirty_bit>();
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//NV308A
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bind_range<NV308A_COLOR, 1, 256, nv308a::color>();
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