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PPU LLVM: MFCR optimized

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This commit is contained in:
Nekotekina 2017-06-25 17:22:33 +03:00
parent 9738ce0cf6
commit 45fae363c6
1 changed files with 18 additions and 2 deletions
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20
rpcs3/Emu/Cell/PPUTranslator.cpp
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@ -5,6 +5,7 @@
#include "PPUInterpreter.h" #include "PPUInterpreter.h"
#include "../Utilities/Log.h" #include "../Utilities/Log.h"
#include <algorithm>
using namespace llvm; using namespace llvm;
@ -2123,9 +2124,24 @@ void PPUTranslator::MFOCRF(ppu_opcode_t op)
return; return;
} }
} }
else else if (std::none_of(m_cr + 0, m_cr + 32, [](auto* p) { return p; }))
{ {
// MFCR // MFCR (optimized)
Value* ln0 = m_ir->CreateIntToPtr(m_ir->CreatePtrToInt(m_ir->CreateStructGEP(nullptr, m_thread, 99), GetType<uptr>()), GetType<u8[16]>()->getPointerTo());
Value* ln1 = m_ir->CreateIntToPtr(m_ir->CreatePtrToInt(m_ir->CreateStructGEP(nullptr, m_thread, 115), GetType<uptr>()), GetType<u8[16]>()->getPointerTo());
ln0 = m_ir->CreateLoad(ln0);
ln1 = m_ir->CreateLoad(ln1);
if (!m_is_be)
{
ln0 = Shuffle(ln0, nullptr, {15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0});
ln1 = Shuffle(ln1, nullptr, {15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0});
}
const auto m0 = Call(GetType<u32>(), m_pure_attr, "llvm.x86.sse2.pmovmskb.128", m_ir->CreateShl(ln0, 7));
const auto m1 = Call(GetType<u32>(), m_pure_attr, "llvm.x86.sse2.pmovmskb.128", m_ir->CreateShl(ln1, 7));
SetGpr(op.rd, m_ir->CreateOr(m_ir->CreateShl(m0, 16), m1));
return;
} }
Value* result{}; Value* result{};