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Small fix

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This commit is contained in:
Nekotekina 2014-09-12 01:10:44 +04:00
parent 8cde1c18c4
commit 3e1c04b356
1 changed files with 12 additions and 14 deletions
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26
rpcs3/Emu/Cell/PPUInterpreter.h
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@ -2298,10 +2298,9 @@ private:
} }
void LVEBX(u32 vd, u32 ra, u32 rb) void LVEBX(u32 vd, u32 ra, u32 rb)
{ {
//const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]; const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
//CPU.VPR[vd].Clear(); CPU.VPR[vd]._u8[15 - (addr & 0xf)] = vm::read8(addr);
//CPU.VPR[vd]._u8[addr & 0xf] = vm::read8(addr); // check LVEWX comments
CPU.VPR[vd] = vm::read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
} }
void SUBFC(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) void SUBFC(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
{ {
@ -2447,10 +2446,9 @@ private:
} }
void LVEHX(u32 vd, u32 ra, u32 rb) void LVEHX(u32 vd, u32 ra, u32 rb)
{ {
//const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~1ULL; const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~1ULL;
//CPU.VPR[vd].Clear(); CPU.VPR[vd]._u16[7 - ((addr >> 1) & 0x7)] = vm::read16(addr);
//(u16&)CPU.VPR[vd]._u8[addr & 0xf] = vm::read16(addr); // check LVEWX comments
CPU.VPR[vd] = vm::read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
} }
void SUBF(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) void SUBF(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
{ {
@ -2497,10 +2495,11 @@ private:
} }
void LVEWX(u32 vd, u32 ra, u32 rb) void LVEWX(u32 vd, u32 ra, u32 rb)
{ {
//const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~3ULL; const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~3ULL;
//CPU.VPR[vd].Clear(); CPU.VPR[vd]._u32[3 - ((addr >> 2) & 0x3)] = vm::read32(addr);
//(u32&)CPU.VPR[vd]._u8[addr & 0xf] = vm::read32(addr); // It's not very good idea to implement it using read128(),
CPU.VPR[vd] = vm::read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL); // because it can theoretically read RawSPU 32-bit MMIO register (read128() will fail)
//CPU.VPR[vd] = vm::read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
} }
void MULHD(u32 rd, u32 ra, u32 rb, bool rc) void MULHD(u32 rd, u32 ra, u32 rb, bool rc)
{ {
@ -2964,8 +2963,7 @@ private:
} }
void LFSX(u32 frd, u32 ra, u32 rb) void LFSX(u32 frd, u32 ra, u32 rb)
{ {
(u32&)CPU.FPR[frd] = vm::read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]); CPU.FPR[frd] = vm::get_ref<be_t<float>>(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]).ToLE();
CPU.FPR[frd] = (float&)CPU.FPR[frd];
} }
void SRW(u32 ra, u32 rs, u32 rb, bool rc) void SRW(u32 ra, u32 rs, u32 rb, bool rc)
{ {