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cellSail fixes and GetRegBySPR split up

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* Fixed cellSailPlayerAddDescriptor
* Fixed cellSailDescriptorSetAutoSelection
* Fixed cellSailDescriptorIsAutoSelection
* Split GetRegBySPR into ReadSPR and WriteSPR
* Added 0x10c for ReadSPR and WriteSPR (Time-based register)
This commit is contained in:
Raul Tambre 2014-11-15 16:45:02 +02:00
parent 4f30e014a4
commit 3af57957d5
3 changed files with 40 additions and 15 deletions
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28
rpcs3/Emu/Cell/PPUInterpreter.h
View file

@ -133,22 +133,40 @@ private:
return ctr_ok && cond_ok; return ctr_ok && cond_ok;
} }
u64& GetRegBySPR(u32 spr) u64 ReadSPR(u32 spr)
{ {
const u32 n = (spr >> 5) | ((spr & 0x1f) << 5); const u32 n = (spr >> 5) | ((spr & 0x1f) << 5);
switch(n) switch (n)
{ {
case 0x001: return CPU.XER.XER; case 0x001: return CPU.XER.XER;
case 0x008: return CPU.LR; case 0x008: return CPU.LR;
case 0x009: return CPU.CTR; case 0x009: return CPU.CTR;
case 0x100: return CPU.USPRG0; case 0x100: return CPU.USPRG0;
case 0x10C: return CPU.TBL;
} }
UNK(fmt::Format("GetRegBySPR error: Unknown SPR 0x%x!", n)); UNK(fmt::Format("ReadSPR error: Unknown SPR 0x%x!", n));
return CPU.XER.XER; return CPU.XER.XER;
} }
void WriteSPR(u32 spr, u64 value)
{
const u32 n = (spr >> 5) | ((spr & 0x1f) << 5);
switch (n)
{
case 0x001: CPU.XER.XER = value; return;
case 0x008: CPU.LR = value; return;
case 0x009: CPU.CTR = value; return;
case 0x100: CPU.USPRG0 = value; return;
case 0x10C: CPU.TBL = value; return;
}
UNK(fmt::Format("WriteSPR error: Unknown SPR 0x%x!", n));
return;
}
void TDI(u32 to, u32 ra, s32 simm16) void TDI(u32 to, u32 ra, s32 simm16)
{ {
s64 a = CPU.GPR[ra]; s64 a = CPU.GPR[ra];
@ -2911,7 +2929,7 @@ private:
} }
void MFSPR(u32 rd, u32 spr) void MFSPR(u32 rd, u32 spr)
{ {
CPU.GPR[rd] = GetRegBySPR(spr); CPU.GPR[rd] = ReadSPR(spr);
} }
void LWAX(u32 rd, u32 ra, u32 rb) void LWAX(u32 rd, u32 ra, u32 rb)
{ {
@ -3062,7 +3080,7 @@ private:
} }
void MTSPR(u32 spr, u32 rs) void MTSPR(u32 spr, u32 rs)
{ {
GetRegBySPR(spr) = CPU.GPR[rs]; WriteSPR(spr, CPU.GPR[rs]);
} }
void DCBI(u32 ra, u32 rb) void DCBI(u32 ra, u32 rb)
{ {

10
rpcs3/Emu/SysCalls/Modules/cellGcmSys.cpp
View file

@ -43,18 +43,18 @@ u32 map_offset_pos = 0;
u32 gcmGetLocalMemorySize(u32 sdk_version) u32 gcmGetLocalMemorySize(u32 sdk_version)
{ {
if (sdk_version >= 0x00220000) { if (sdk_version >= 0x00220000) {
return 0x0F900000; // 249MB return 0x0F900000; // 249MB
} }
if (sdk_version >= 0x00200000) { if (sdk_version >= 0x00200000) {
return 0x0F200000; // 242MB return 0x0F200000; // 242MB
} }
if (sdk_version >= 0x00190000) { if (sdk_version >= 0x00190000) {
return 0x0EA00000; // 234MB return 0x0EA00000; // 234MB
} }
if (sdk_version >= 0x00180000) { if (sdk_version >= 0x00180000) {
return 0x0E800000; // 232MB return 0x0E800000; // 232MB
} }
return 0x0E000000; // 224MB return 0x0E000000; // 224MB
} }
CellGcmOffsetTable offsetTable; CellGcmOffsetTable offsetTable;

17
rpcs3/Emu/SysCalls/Modules/cellSail.cpp
View file

@ -71,17 +71,24 @@ int cellSailDescriptorGetMediaInfo()
int cellSailDescriptorSetAutoSelection(vm::ptr<CellSailDescriptor> pSelf, bool autoSelection) int cellSailDescriptorSetAutoSelection(vm::ptr<CellSailDescriptor> pSelf, bool autoSelection)
{ {
cellSail->Todo("cellSailDescriptorSetAutoSelection(pSelf_addr=0x%x, autoSelection=%b)", pSelf.addr(), autoSelection); cellSail->Todo("cellSailDescriptorSetAutoSelection(pSelf_addr=0x%x, autoSelection=%s)", pSelf.addr(), autoSelection ? "true" : "false");
pSelf->autoSelection = autoSelection; if (pSelf) {
pSelf->autoSelection = autoSelection;
return autoSelection;
}
return autoSelection; return CELL_OK;
} }
int cellSailDescriptorIsAutoSelection(vm::ptr<CellSailDescriptor> pSelf) int cellSailDescriptorIsAutoSelection(vm::ptr<CellSailDescriptor> pSelf)
{ {
cellSail->Warning("cellSailDescriptorIsAutoSelection(pSelf_addr=0x%x)", pSelf.addr()); cellSail->Warning("cellSailDescriptorIsAutoSelection(pSelf_addr=0x%x)", pSelf.addr());
return pSelf->autoSelection;
if (pSelf)
return pSelf->autoSelection;
return CELL_OK;
} }
int cellSailDescriptorCreateDatabase() int cellSailDescriptorCreateDatabase()
@ -595,7 +602,7 @@ int cellSailPlayerAddDescriptor(vm::ptr<CellSailPlayer> pSelf, vm::ptr<CellSailD
{ {
cellSail->Warning("cellSailPlayerAddDescriptor(pSelf_addr=0x%x, pDesc_addr=0x%x)", pSelf.addr(), pDesc.addr()); cellSail->Warning("cellSailPlayerAddDescriptor(pSelf_addr=0x%x, pDesc_addr=0x%x)", pSelf.addr(), pDesc.addr());
if (pSelf->descriptors < 3 && pDesc) if (pSelf && pSelf->descriptors < 3 && pDesc)
{ {
pSelf->descriptors++; pSelf->descriptors++;
pSelf->registeredDescriptors[pSelf->descriptors] = pDesc; pSelf->registeredDescriptors[pSelf->descriptors] = pDesc;