mirror of
https://github.com/RPCS3/rpcs3.git
synced 2025-07-12 17:58:37 +12:00
Remove HERE macro
Some cleanup. Add location to some functions.
This commit is contained in:
parent
d25c401aec
commit
36c8654fb8
130 changed files with 969 additions and 889 deletions
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@ -87,7 +87,7 @@ FORCE_INLINE auto ppu_feed_data(ppu_thread& ppu, u64 addr)
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{
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static_assert(sizeof(T) <= 128, "Incompatible type-size, break down into smaller loads");
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auto value = vm::_ref<T>(vm::cast(addr, HERE));
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auto value = vm::_ref<T>(vm::cast(addr));
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if (!ppu.use_full_rdata)
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{
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@ -3421,7 +3421,7 @@ bool ppu_interpreter::MFOCRF(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::LWARX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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ppu.gpr[op.rd] = ppu_lwarx(ppu, vm::cast(addr, HERE));
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ppu.gpr[op.rd] = ppu_lwarx(ppu, vm::cast(addr));
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return true;
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}
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@ -3580,7 +3580,7 @@ bool ppu_interpreter::MULHW(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::LDARX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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ppu.gpr[op.rd] = ppu_ldarx(ppu, vm::cast(addr, HERE));
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ppu.gpr[op.rd] = ppu_ldarx(ppu, vm::cast(addr));
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return true;
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}
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@ -3631,7 +3631,7 @@ bool ppu_interpreter::STVEBX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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const u8 eb = addr & 0xf;
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vm::write8(vm::cast(addr, HERE), ppu.vr[op.vs]._u8[15 - eb]);
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vm::write8(vm::cast(addr), ppu.vr[op.vs]._u8[15 - eb]);
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return true;
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}
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@ -3710,21 +3710,21 @@ bool ppu_interpreter::MTOCRF(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STDX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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vm::write64(vm::cast(addr, HERE), ppu.gpr[op.rs]);
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vm::write64(vm::cast(addr), ppu.gpr[op.rs]);
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return true;
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}
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bool ppu_interpreter::STWCX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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ppu_cr_set(ppu, 0, false, false, ppu_stwcx(ppu, vm::cast(addr, HERE), static_cast<u32>(ppu.gpr[op.rs])), ppu.xer.so);
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ppu_cr_set(ppu, 0, false, false, ppu_stwcx(ppu, vm::cast(addr), static_cast<u32>(ppu.gpr[op.rs])), ppu.xer.so);
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return true;
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}
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bool ppu_interpreter::STWX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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vm::write32(vm::cast(addr, HERE), static_cast<u32>(ppu.gpr[op.rs]));
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vm::write32(vm::cast(addr), static_cast<u32>(ppu.gpr[op.rs]));
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return true;
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}
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@ -3732,14 +3732,14 @@ bool ppu_interpreter::STVEHX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb]) & ~1ULL;
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const u8 eb = (addr & 0xf) >> 1;
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vm::write16(vm::cast(addr, HERE), ppu.vr[op.vs]._u16[7 - eb]);
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vm::write16(vm::cast(addr), ppu.vr[op.vs]._u16[7 - eb]);
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return true;
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}
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bool ppu_interpreter::STDUX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = ppu.gpr[op.ra] + ppu.gpr[op.rb];
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vm::write64(vm::cast(addr, HERE), ppu.gpr[op.rs]);
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vm::write64(vm::cast(addr), ppu.gpr[op.rs]);
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ppu.gpr[op.ra] = addr;
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return true;
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}
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@ -3747,7 +3747,7 @@ bool ppu_interpreter::STDUX(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STWUX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = ppu.gpr[op.ra] + ppu.gpr[op.rb];
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vm::write32(vm::cast(addr, HERE), static_cast<u32>(ppu.gpr[op.rs]));
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vm::write32(vm::cast(addr), static_cast<u32>(ppu.gpr[op.rs]));
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ppu.gpr[op.ra] = addr;
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return true;
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}
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@ -3756,7 +3756,7 @@ bool ppu_interpreter::STVEWX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb]) & ~3ULL;
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const u8 eb = (addr & 0xf) >> 2;
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vm::write32(vm::cast(addr, HERE), ppu.vr[op.vs]._u32[3 - eb]);
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vm::write32(vm::cast(addr), ppu.vr[op.vs]._u32[3 - eb]);
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return true;
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}
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@ -3785,21 +3785,21 @@ bool ppu_interpreter::ADDZE(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STDCX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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ppu_cr_set(ppu, 0, false, false, ppu_stdcx(ppu, vm::cast(addr, HERE), ppu.gpr[op.rs]), ppu.xer.so);
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ppu_cr_set(ppu, 0, false, false, ppu_stdcx(ppu, vm::cast(addr), ppu.gpr[op.rs]), ppu.xer.so);
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return true;
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}
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bool ppu_interpreter::STBX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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vm::write8(vm::cast(addr, HERE), static_cast<u8>(ppu.gpr[op.rs]));
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vm::write8(vm::cast(addr), static_cast<u8>(ppu.gpr[op.rs]));
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return true;
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}
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bool ppu_interpreter::STVX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb]) & ~0xfull;
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vm::_ref<v128>(vm::cast(addr, HERE)) = ppu.vr[op.vs];
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vm::_ref<v128>(vm::cast(addr)) = ppu.vr[op.vs];
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return true;
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}
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@ -3855,7 +3855,7 @@ bool ppu_interpreter::DCBTST(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STBUX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = ppu.gpr[op.ra] + ppu.gpr[op.rb];
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vm::write8(vm::cast(addr, HERE), static_cast<u8>(ppu.gpr[op.rs]));
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vm::write8(vm::cast(addr), static_cast<u8>(ppu.gpr[op.rs]));
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ppu.gpr[op.ra] = addr;
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return true;
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}
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@ -3891,7 +3891,7 @@ bool ppu_interpreter::EQV(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::ECIWX(ppu_thread& ppu, ppu_opcode_t op)
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{
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fmt::throw_exception("ECIWX" HERE);
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fmt::throw_exception("ECIWX");
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}
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bool ppu_interpreter::LHZUX(ppu_thread& ppu, ppu_opcode_t op)
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@ -3922,7 +3922,7 @@ bool ppu_interpreter::MFSPR(ppu_thread& ppu, ppu_opcode_t op)
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case 0x10C: ppu.gpr[op.rd] = get_timebased_time(); break;
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case 0x10D: ppu.gpr[op.rd] = get_timebased_time() >> 32; break;
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default: fmt::throw_exception("MFSPR 0x%x" HERE, n);
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default: fmt::throw_exception("MFSPR 0x%x", n);
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}
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return true;
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@ -3962,7 +3962,7 @@ bool ppu_interpreter::MFTB(ppu_thread& ppu, ppu_opcode_t op)
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{
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case 0x10C: ppu.gpr[op.rd] = get_timebased_time(); break;
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case 0x10D: ppu.gpr[op.rd] = get_timebased_time() >> 32; break;
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default: fmt::throw_exception("MFTB 0x%x" HERE, n);
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default: fmt::throw_exception("MFTB 0x%x", n);
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}
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return true;
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@ -3992,7 +3992,7 @@ bool ppu_interpreter::LHAUX(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STHX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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vm::write16(vm::cast(addr, HERE), static_cast<u16>(ppu.gpr[op.rs]));
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vm::write16(vm::cast(addr), static_cast<u16>(ppu.gpr[op.rs]));
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return true;
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}
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@ -4005,13 +4005,13 @@ bool ppu_interpreter::ORC(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::ECOWX(ppu_thread& ppu, ppu_opcode_t op)
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{
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fmt::throw_exception("ECOWX" HERE);
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fmt::throw_exception("ECOWX");
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}
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bool ppu_interpreter::STHUX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = ppu.gpr[op.ra] + ppu.gpr[op.rb];
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vm::write16(vm::cast(addr, HERE), static_cast<u16>(ppu.gpr[op.rs]));
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vm::write16(vm::cast(addr), static_cast<u16>(ppu.gpr[op.rs]));
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ppu.gpr[op.ra] = addr;
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return true;
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}
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@ -4061,7 +4061,7 @@ bool ppu_interpreter::MTSPR(ppu_thread& ppu, ppu_opcode_t op)
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case 0x008: ppu.lr = ppu.gpr[op.rs]; break;
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case 0x009: ppu.ctr = ppu.gpr[op.rs]; break;
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case 0x100: ppu.vrsave = static_cast<u32>(ppu.gpr[op.rs]); break;
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default: fmt::throw_exception("MTSPR 0x%x" HERE, n);
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default: fmt::throw_exception("MTSPR 0x%x", n);
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}
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return true;
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@ -4082,7 +4082,7 @@ bool ppu_interpreter::NAND(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STVXL(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = (op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb]) & ~0xfull;
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vm::_ref<v128>(vm::cast(addr, HERE)) = ppu.vr[op.vs];
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vm::_ref<v128>(vm::cast(addr)) = ppu.vr[op.vs];
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return true;
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}
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@ -4250,7 +4250,7 @@ bool ppu_interpreter::STVLX(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STDBRX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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vm::_ref<le_t<u64>>(vm::cast(addr, HERE)) = ppu.gpr[op.rs];
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vm::_ref<le_t<u64>>(vm::cast(addr)) = ppu.gpr[op.rs];
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return true;
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}
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@ -4260,7 +4260,7 @@ bool ppu_interpreter::STSWX(ppu_thread& ppu, ppu_opcode_t op)
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u32 count = ppu.xer.cnt & 0x7F;
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for (; count >= 4; count -= 4, addr += 4, op.rs = (op.rs + 1) & 31)
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{
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vm::write32(vm::cast(addr, HERE), static_cast<u32>(ppu.gpr[op.rs]));
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vm::write32(vm::cast(addr), static_cast<u32>(ppu.gpr[op.rs]));
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}
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if (count)
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{
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@ -4268,7 +4268,7 @@ bool ppu_interpreter::STSWX(ppu_thread& ppu, ppu_opcode_t op)
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for (u32 byte = 0; byte < count; byte++)
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{
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u8 byte_value = static_cast<u8>(value >> ((3 ^ byte) * 8));
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vm::write8(vm::cast(addr + byte, HERE), byte_value);
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vm::write8(vm::cast(addr + byte), byte_value);
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}
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}
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return true;
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@ -4277,14 +4277,14 @@ bool ppu_interpreter::STSWX(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STWBRX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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vm::_ref<le_t<u32>>(vm::cast(addr, HERE)) = static_cast<u32>(ppu.gpr[op.rs]);
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vm::_ref<le_t<u32>>(vm::cast(addr)) = static_cast<u32>(ppu.gpr[op.rs]);
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return true;
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}
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bool ppu_interpreter::STFSX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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vm::_ref<f32>(vm::cast(addr, HERE)) = static_cast<float>(ppu.fpr[op.frs]);
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vm::_ref<f32>(vm::cast(addr)) = static_cast<float>(ppu.fpr[op.frs]);
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return true;
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}
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@ -4298,7 +4298,7 @@ bool ppu_interpreter::STVRX(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STFSUX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = ppu.gpr[op.ra] + ppu.gpr[op.rb];
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vm::_ref<f32>(vm::cast(addr, HERE)) = static_cast<float>(ppu.fpr[op.frs]);
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vm::_ref<f32>(vm::cast(addr)) = static_cast<float>(ppu.fpr[op.frs]);
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ppu.gpr[op.ra] = addr;
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return true;
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}
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@ -4313,7 +4313,7 @@ bool ppu_interpreter::STSWI(ppu_thread& ppu, ppu_opcode_t op)
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{
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if (N > 3)
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{
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vm::write32(vm::cast(addr, HERE), static_cast<u32>(ppu.gpr[reg]));
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vm::write32(vm::cast(addr), static_cast<u32>(ppu.gpr[reg]));
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addr += 4;
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N -= 4;
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}
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@ -4323,7 +4323,7 @@ bool ppu_interpreter::STSWI(ppu_thread& ppu, ppu_opcode_t op)
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while (N > 0)
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{
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N = N - 1;
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vm::write8(vm::cast(addr, HERE), (0xFF000000 & buf) >> 24);
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vm::write8(vm::cast(addr), (0xFF000000 & buf) >> 24);
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buf <<= 8;
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addr++;
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}
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@ -4336,14 +4336,14 @@ bool ppu_interpreter::STSWI(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STFDX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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vm::_ref<f64>(vm::cast(addr, HERE)) = ppu.fpr[op.frs];
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vm::_ref<f64>(vm::cast(addr)) = ppu.fpr[op.frs];
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return true;
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}
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bool ppu_interpreter::STFDUX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = ppu.gpr[op.ra] + ppu.gpr[op.rb];
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vm::_ref<f64>(vm::cast(addr, HERE)) = ppu.fpr[op.frs];
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vm::_ref<f64>(vm::cast(addr)) = ppu.fpr[op.frs];
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ppu.gpr[op.ra] = addr;
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return true;
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}
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@ -4443,7 +4443,7 @@ bool ppu_interpreter::STVLXL(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STHBRX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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vm::_ref<le_t<u16>>(vm::cast(addr, HERE)) = static_cast<u16>(ppu.gpr[op.rs]);
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vm::_ref<le_t<u16>>(vm::cast(addr)) = static_cast<u16>(ppu.gpr[op.rs]);
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return true;
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}
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@ -4469,7 +4469,7 @@ bool ppu_interpreter::EXTSB(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STFIWX(ppu_thread& ppu, ppu_opcode_t op)
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
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vm::write32(vm::cast(addr, HERE), static_cast<u32>(std::bit_cast<u64>(ppu.fpr[op.frs])));
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vm::write32(vm::cast(addr), static_cast<u32>(std::bit_cast<u64>(ppu.fpr[op.frs])));
|
||||
return true;
|
||||
}
|
||||
|
||||
|
@ -4488,7 +4488,7 @@ bool ppu_interpreter::ICBI(ppu_thread& ppu, ppu_opcode_t op)
|
|||
bool ppu_interpreter::DCBZ(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? ppu.gpr[op.ra] + ppu.gpr[op.rb] : ppu.gpr[op.rb];
|
||||
const u32 addr0 = vm::cast(addr, HERE) & ~127;
|
||||
const u32 addr0 = vm::cast(addr) & ~127;
|
||||
|
||||
if (g_cfg.core.accurate_cache_line_stores)
|
||||
{
|
||||
|
@ -4535,12 +4535,12 @@ bool ppu_interpreter::STW(ppu_thread& ppu, ppu_opcode_t op)
|
|||
{
|
||||
const u64 addr = op.ra ? ppu.gpr[op.ra] + op.simm16 : op.simm16;
|
||||
const u32 value = static_cast<u32>(ppu.gpr[op.rs]);
|
||||
vm::write32(vm::cast(addr, HERE), value);
|
||||
vm::write32(vm::cast(addr), value);
|
||||
|
||||
//Insomniac engine v3 & v4 (newer R&C, Fuse, Resitance 3)
|
||||
if (value == 0xAAAAAAAA) [[unlikely]]
|
||||
{
|
||||
vm::reservation_update(vm::cast(addr, HERE));
|
||||
vm::reservation_update(vm::cast(addr));
|
||||
}
|
||||
|
||||
return true;
|
||||
|
@ -4549,7 +4549,7 @@ bool ppu_interpreter::STW(ppu_thread& ppu, ppu_opcode_t op)
|
|||
bool ppu_interpreter::STWU(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = ppu.gpr[op.ra] + op.simm16;
|
||||
vm::write32(vm::cast(addr, HERE), static_cast<u32>(ppu.gpr[op.rs]));
|
||||
vm::write32(vm::cast(addr), static_cast<u32>(ppu.gpr[op.rs]));
|
||||
ppu.gpr[op.ra] = addr;
|
||||
return true;
|
||||
}
|
||||
|
@ -4557,14 +4557,14 @@ bool ppu_interpreter::STWU(ppu_thread& ppu, ppu_opcode_t op)
|
|||
bool ppu_interpreter::STB(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? ppu.gpr[op.ra] + op.simm16 : op.simm16;
|
||||
vm::write8(vm::cast(addr, HERE), static_cast<u8>(ppu.gpr[op.rs]));
|
||||
vm::write8(vm::cast(addr), static_cast<u8>(ppu.gpr[op.rs]));
|
||||
return true;
|
||||
}
|
||||
|
||||
bool ppu_interpreter::STBU(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = ppu.gpr[op.ra] + op.simm16;
|
||||
vm::write8(vm::cast(addr, HERE), static_cast<u8>(ppu.gpr[op.rs]));
|
||||
vm::write8(vm::cast(addr), static_cast<u8>(ppu.gpr[op.rs]));
|
||||
ppu.gpr[op.ra] = addr;
|
||||
return true;
|
||||
}
|
||||
|
@ -4602,14 +4602,14 @@ bool ppu_interpreter::LHAU(ppu_thread& ppu, ppu_opcode_t op)
|
|||
bool ppu_interpreter::STH(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? ppu.gpr[op.ra] + op.simm16 : op.simm16;
|
||||
vm::write16(vm::cast(addr, HERE), static_cast<u16>(ppu.gpr[op.rs]));
|
||||
vm::write16(vm::cast(addr), static_cast<u16>(ppu.gpr[op.rs]));
|
||||
return true;
|
||||
}
|
||||
|
||||
bool ppu_interpreter::STHU(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = ppu.gpr[op.ra] + op.simm16;
|
||||
vm::write16(vm::cast(addr, HERE), static_cast<u16>(ppu.gpr[op.rs]));
|
||||
vm::write16(vm::cast(addr), static_cast<u16>(ppu.gpr[op.rs]));
|
||||
ppu.gpr[op.ra] = addr;
|
||||
return true;
|
||||
}
|
||||
|
@ -4629,7 +4629,7 @@ bool ppu_interpreter::STMW(ppu_thread& ppu, ppu_opcode_t op)
|
|||
u64 addr = op.ra ? ppu.gpr[op.ra] + op.simm16 : op.simm16;
|
||||
for (u32 i = op.rs; i<32; ++i, addr += 4)
|
||||
{
|
||||
vm::write32(vm::cast(addr, HERE), static_cast<u32>(ppu.gpr[i]));
|
||||
vm::write32(vm::cast(addr), static_cast<u32>(ppu.gpr[i]));
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
@ -4667,14 +4667,14 @@ bool ppu_interpreter::LFDU(ppu_thread& ppu, ppu_opcode_t op)
|
|||
bool ppu_interpreter::STFS(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? ppu.gpr[op.ra] + op.simm16 : op.simm16;
|
||||
vm::_ref<f32>(vm::cast(addr, HERE)) = static_cast<float>(ppu.fpr[op.frs]);
|
||||
vm::_ref<f32>(vm::cast(addr)) = static_cast<float>(ppu.fpr[op.frs]);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool ppu_interpreter::STFSU(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = ppu.gpr[op.ra] + op.simm16;
|
||||
vm::_ref<f32>(vm::cast(addr, HERE)) = static_cast<float>(ppu.fpr[op.frs]);
|
||||
vm::_ref<f32>(vm::cast(addr)) = static_cast<float>(ppu.fpr[op.frs]);
|
||||
ppu.gpr[op.ra] = addr;
|
||||
return true;
|
||||
}
|
||||
|
@ -4682,14 +4682,14 @@ bool ppu_interpreter::STFSU(ppu_thread& ppu, ppu_opcode_t op)
|
|||
bool ppu_interpreter::STFD(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = op.ra ? ppu.gpr[op.ra] + op.simm16 : op.simm16;
|
||||
vm::_ref<f64>(vm::cast(addr, HERE)) = ppu.fpr[op.frs];
|
||||
vm::_ref<f64>(vm::cast(addr)) = ppu.fpr[op.frs];
|
||||
return true;
|
||||
}
|
||||
|
||||
bool ppu_interpreter::STFDU(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = ppu.gpr[op.ra] + op.simm16;
|
||||
vm::_ref<f64>(vm::cast(addr, HERE)) = ppu.fpr[op.frs];
|
||||
vm::_ref<f64>(vm::cast(addr)) = ppu.fpr[op.frs];
|
||||
ppu.gpr[op.ra] = addr;
|
||||
return true;
|
||||
}
|
||||
|
@ -4719,14 +4719,14 @@ bool ppu_interpreter::LWA(ppu_thread& ppu, ppu_opcode_t op)
|
|||
bool ppu_interpreter::STD(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = (op.simm16 & ~3) + (op.ra ? ppu.gpr[op.ra] : 0);
|
||||
vm::write64(vm::cast(addr, HERE), ppu.gpr[op.rs]);
|
||||
vm::write64(vm::cast(addr), ppu.gpr[op.rs]);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool ppu_interpreter::STDU(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
const u64 addr = ppu.gpr[op.ra] + (op.simm16 & ~3);
|
||||
vm::write64(vm::cast(addr, HERE), ppu.gpr[op.rs]);
|
||||
vm::write64(vm::cast(addr), ppu.gpr[op.rs]);
|
||||
ppu.gpr[op.ra] = addr;
|
||||
return true;
|
||||
}
|
||||
|
@ -5172,5 +5172,5 @@ bool ppu_interpreter::FCFID(ppu_thread& ppu, ppu_opcode_t op)
|
|||
|
||||
bool ppu_interpreter::UNK(ppu_thread& ppu, ppu_opcode_t op)
|
||||
{
|
||||
fmt::throw_exception("Unknown/Illegal opcode: 0x%08x at 0x%x" HERE, op.opcode, ppu.cia);
|
||||
fmt::throw_exception("Unknown/Illegal opcode: 0x%08x at 0x%x", op.opcode, ppu.cia);
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue