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https://github.com/RPCS3/rpcs3.git
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SPU: Implement events channel count, minor interrupts fixes
This commit is contained in:
eladash
kd-11
parent
cdc3ee6c1c
commit
36ac68b436
7 changed files with 160 additions and 267 deletions
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@ -858,8 +858,11 @@ std::string spu_thread::dump_regs() const
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fmt::append(ret, "r%d: %s\n", i, gpr[i]);
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}
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fmt::append(ret, "\nEvent Stat: 0x%x\n", +ch_event_stat);
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fmt::append(ret, "Event Mask: 0x%x\n", +ch_event_mask);
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const auto events = ch_events.load();
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fmt::append(ret, "\nEvent Stat: 0x%x\n", events.events);
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fmt::append(ret, "Event Mask: 0x%x\n", events.mask);
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fmt::append(ret, "Event Count: %u\n", events.count);
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fmt::append(ret, "SRR0: 0x%05x\n", srr0);
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fmt::append(ret, "Stall Stat: %s\n", ch_stall_stat);
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fmt::append(ret, "Stall Mask: 0x%x\n", ch_stall_mask);
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@ -872,7 +875,7 @@ std::string spu_thread::dump_regs() const
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fmt::append(ret, "Reservation Addr: none\n");
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fmt::append(ret, "Atomic Stat: %s\n", ch_atomic_stat); // TODO: use mfc_atomic_status formatting
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fmt::append(ret, "Interrupts Enabled: %s\n", interrupts_enabled.load());
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fmt::append(ret, "Interrupts: %s\n", interrupts_enabled ? "Enabled" : "Disabled");
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fmt::append(ret, "Inbound Mailbox: %s\n", ch_in_mbox);
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fmt::append(ret, "Out Mailbox: %s\n", ch_out_mbox);
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fmt::append(ret, "Out Interrupts Mailbox: %s\n", ch_out_intr_mbox);
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@ -975,9 +978,8 @@ void spu_thread::cpu_init()
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ch_out_mbox.data.raw() = {};
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ch_out_intr_mbox.data.raw() = {};
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ch_event_mask.raw() = 0;
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ch_event_stat.raw() = 0;
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interrupts_enabled.raw() = false;
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ch_events.raw() = {};
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interrupts_enabled = false;
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raddr = 0;
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ch_dec_start_timestamp = get_timebased_time();
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@ -1805,7 +1807,7 @@ bool spu_thread::do_list_transfer(spu_mfc_cmd& args)
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if (!ch_stall_stat.get_count())
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{
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ch_event_stat |= SPU_EVENT_SN;
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set_events(SPU_EVENT_SN);
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}
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ch_stall_stat.set_value(utils::rol32(1, args.tag) | ch_stall_stat.get_value());
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@ -1926,7 +1928,7 @@ bool spu_thread::do_putllc(const spu_mfc_cmd& args)
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// Last check for event before we clear the reservation
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if (raddr == addr || rtime != (vm::reservation_acquire(raddr, 128) & (-128 | vm::dma_lockb)) || !cmp_rdata(rdata, vm::_ref<decltype(rdata)>(raddr)))
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{
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ch_event_stat |= SPU_EVENT_LR;
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set_events(SPU_EVENT_LR);
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}
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}
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@ -2137,9 +2139,8 @@ void spu_thread::do_mfc(bool wait)
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bool spu_thread::check_mfc_interrupts(u32 next_pc)
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{
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if (interrupts_enabled && (ch_event_mask & ch_event_stat & SPU_EVENT_INTR_IMPLEMENTED) > 0)
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if (ch_events.load().count && std::exchange(interrupts_enabled, false))
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{
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interrupts_enabled.release(false);
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srr0 = next_pc;
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// Test for BR/BRA instructions (they are equivalent at zero pc)
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@ -2251,7 +2252,7 @@ bool spu_thread::process_mfc_cmd()
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// Last check for event before we replace the reservation with a new one
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if ((vm::reservation_acquire(raddr, 128) & (-128 | vm::dma_lockb)) != rtime || !cmp_rdata(rdata, vm::_ref<decltype(rdata)>(raddr)))
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{
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ch_event_stat |= SPU_EVENT_LR;
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set_events(SPU_EVENT_LR);
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}
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}
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else if (raddr == addr)
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@ -2259,7 +2260,7 @@ bool spu_thread::process_mfc_cmd()
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// Lost previous reservation on polling
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if (ntime != rtime || !cmp_rdata(rdata, dst))
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{
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ch_event_stat |= SPU_EVENT_LR;
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set_events(SPU_EVENT_LR);
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}
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}
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@ -2413,19 +2414,19 @@ bool spu_thread::process_mfc_cmd()
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ch_mfc_cmd.cmd, ch_mfc_cmd.lsa, ch_mfc_cmd.eal, ch_mfc_cmd.tag, ch_mfc_cmd.size);
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}
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u32 spu_thread::get_events(u32 mask_hint, bool waiting)
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spu_thread::ch_events_t spu_thread::get_events(u32 mask_hint, bool waiting, bool reading)
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{
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const u32 mask1 = ch_event_mask;
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if (mask1 & ~SPU_EVENT_IMPLEMENTED)
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if (auto mask1 = ch_events.load().mask; mask1 & ~SPU_EVENT_IMPLEMENTED)
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{
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fmt::throw_exception("SPU Events not implemented (mask=0x%x)" HERE, mask1);
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}
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u32 collect = 0;
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// Check reservation status and set SPU_EVENT_LR if lost
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if (mask_hint & SPU_EVENT_LR && raddr && ((vm::reservation_acquire(raddr, sizeof(rdata)) & -128) != rtime || !cmp_rdata(rdata, vm::_ref<decltype(rdata)>(raddr))))
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{
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ch_event_stat |= SPU_EVENT_LR;
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collect |= SPU_EVENT_LR;
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raddr = 0;
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}
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@ -2436,42 +2437,47 @@ u32 spu_thread::get_events(u32 mask_hint, bool waiting)
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{
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// Set next event to the next time the decrementer underflows
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ch_dec_start_timestamp -= res << 32;
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if ((ch_event_stat & SPU_EVENT_TM) == 0)
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{
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ch_event_stat |= SPU_EVENT_TM;
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}
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collect |= SPU_EVENT_TM;
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}
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}
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// Simple polling or polling with atomically set/removed SPU_EVENT_WAITING flag
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return !waiting ? ch_event_stat & mask1 : ch_event_stat.atomic_op([&](u32& stat) -> u32
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if (collect)
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{
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if (u32 res = stat & mask1)
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{
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stat &= ~SPU_EVENT_WAITING;
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return res;
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}
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set_events(collect);
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}
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stat |= SPU_EVENT_WAITING;
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return 0;
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});
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return ch_events.fetch_op([&](ch_events_t& events)
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{
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if (!reading)
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return false;
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if (waiting)
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events.waiting = !events.count;
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events.count = false;
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return true;
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}).first;
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}
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void spu_thread::set_events(u32 mask)
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void spu_thread::set_events(u32 bits)
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{
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if (mask & ~SPU_EVENT_IMPLEMENTED)
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{
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fmt::throw_exception("SPU Events not implemented (mask=0x%x)" HERE, mask);
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}
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ASSUME(!(bits & ~0xffff));
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// Set new events, get old event mask
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const u32 old_stat = ch_event_stat.fetch_or(mask);
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// Notify if some events were set
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if (~old_stat & mask && old_stat & SPU_EVENT_WAITING && ch_event_stat & SPU_EVENT_WAITING)
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if (ch_events.atomic_op([&](ch_events_t& events)
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{
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notify();
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events.events |= bits;
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// If one masked event was fired, set the channel count (even if the event bit was already 1)
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if (events.mask & bits)
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{
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events.count = true;
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return !!events.waiting;
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}
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return false;
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}))
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{
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// Preserved for external events implementation
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//notify();
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}
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}
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@ -2480,17 +2486,13 @@ void spu_thread::set_interrupt_status(bool enable)
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if (enable)
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{
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// Detect enabling interrupts with events masked
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if (ch_event_mask & ~SPU_EVENT_INTR_IMPLEMENTED)
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if (auto mask = ch_events.load().mask; mask & ~SPU_EVENT_INTR_IMPLEMENTED)
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{
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fmt::throw_exception("SPU Interrupts not implemented (mask=0x%x)" HERE, +ch_event_mask);
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fmt::throw_exception("SPU Interrupts not implemented (mask=0x%x)" HERE, mask);
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}
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}
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interrupts_enabled = true;
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}
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else
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{
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interrupts_enabled = false;
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}
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interrupts_enabled = enable;
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}
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u32 spu_thread::get_ch_count(u32 ch)
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@ -2508,7 +2510,7 @@ u32 spu_thread::get_ch_count(u32 ch)
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case SPU_RdSigNotify1: return ch_snr1.get_count();
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case SPU_RdSigNotify2: return ch_snr2.get_count();
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case MFC_RdAtomicStat: return ch_atomic_stat.get_count();
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case SPU_RdEventStat: return get_events() != 0;
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case SPU_RdEventStat: return get_events().count;
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case MFC_Cmd: return 16 - mfc_size;
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}
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@ -2645,18 +2647,17 @@ s64 spu_thread::get_ch_value(u32 ch)
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case SPU_RdEventMask:
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{
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return ch_event_mask;
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return ch_events.load().mask;
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}
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case SPU_RdEventStat:
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{
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const u32 mask1 = ch_event_mask;
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const u32 mask1 = ch_events.load().mask;
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auto events = get_events(mask1, false, true);
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u32 res = get_events(mask1);
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if (res)
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if (events.count)
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{
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return res;
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return events.events & mask1;
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}
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spu_function_logger logger(*this, "MFC Events read");
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@ -2669,7 +2670,7 @@ s64 spu_thread::get_ch_value(u32 ch)
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fmt::throw_exception("Not supported: event mask 0x%x" HERE, mask1);
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}
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while (res = get_events(mask1), !res)
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for (; !events.count; events = get_events(mask1, false, true))
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{
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state += cpu_flag::wait;
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@ -2682,10 +2683,10 @@ s64 spu_thread::get_ch_value(u32 ch)
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}
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check_state();
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return res;
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return events.events & mask1;
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}
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while (res = get_events(mask1, true), !res)
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for (; !events.count; events = get_events(mask1, true, true))
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{
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state += cpu_flag::wait;
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@ -2698,7 +2699,7 @@ s64 spu_thread::get_ch_value(u32 ch)
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}
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check_state();
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return res;
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return events.events & mask1;
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}
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case SPU_RdMachStat:
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@ -3006,7 +3007,28 @@ bool spu_thread::set_ch_value(u32 ch, u32 value)
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case SPU_WrEventMask:
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{
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ch_event_mask = value;
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get_events(value);
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if (ch_events.atomic_op([&](ch_events_t& events)
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{
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events.mask = value;
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if (events.events & events.mask)
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{
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events.count = true;
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return true;
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}
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return false;
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}))
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{
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// Check interrupts in case count is 1
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if (check_mfc_interrupts(pc + 4))
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{
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spu_runtime::g_escape(this);
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}
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}
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return true;
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}
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@ -3014,7 +3036,27 @@ bool spu_thread::set_ch_value(u32 ch, u32 value)
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{
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// "Collect" events before final acknowledgment
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get_events(value);
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ch_event_stat &= ~value;
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if (ch_events.atomic_op([&](ch_events_t& events)
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{
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events.events &= ~value;
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if (events.events & events.mask)
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{
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events.count = true;
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return true;
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}
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return false;
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}))
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{
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// Check interrupts in case count is 1
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if (check_mfc_interrupts(pc + 4))
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{
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spu_runtime::g_escape(this);
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}
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}
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return true;
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}
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