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Merge pull request #943 from raven02/patch-12

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RSX: add alpha func/ref , depth func/mask and bug fix
This commit is contained in:
Raul Tambre 2015-01-01 11:17:18 +02:00
commit 2d46830ba8
5 changed files with 107 additions and 63 deletions
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50
rpcs3/Emu/RSX/GL/GLGSRender.cpp
View file

@ -1683,7 +1683,7 @@ void GLGSRender::Enable(u32 cmd, u32 enable)
enable ? glEnable(GL_POLYGON_SMOOTH) : glDisable(GL_POLYGON_SMOOTH); enable ? glEnable(GL_POLYGON_SMOOTH) : glDisable(GL_POLYGON_SMOOTH);
break; break;
case NV4097_SET_RESTART_INDEX: case NV4097_SET_RESTART_INDEX_ENABLE:
enable ? glEnable(GL_PRIMITIVE_RESTART) : glDisable(GL_PRIMITIVE_RESTART); enable ? glEnable(GL_PRIMITIVE_RESTART) : glDisable(GL_PRIMITIVE_RESTART);
break; break;
@ -1704,12 +1704,12 @@ void GLGSRender::Enable(u32 cmd, u32 enable)
break; break;
case NV4097_SET_USER_CLIP_PLANE_CONTROL: case NV4097_SET_USER_CLIP_PLANE_CONTROL:
u32 clip_plane_0 = enable & 0xf; const u32 clip_plane_0 = enable & 0xf;
u32 clip_plane_1 = (enable >> 4) & 0xf; const u32 clip_plane_1 = (enable >> 4) & 0xf;
u32 clip_plane_2 = (enable >> 8) & 0xf; const u32 clip_plane_2 = (enable >> 8) & 0xf;
u32 clip_plane_3 = (enable >> 12) & 0xf; const u32 clip_plane_3 = (enable >> 12) & 0xf;
u32 clip_plane_4 = (enable >> 16) & 0xf; const u32 clip_plane_4 = (enable >> 16) & 0xf;
u32 clip_plane_5 = enable >> 20; const u32 clip_plane_5 = enable >> 20;
clip_plane_0 ? glEnable(GL_CLIP_PLANE0) : glDisable(GL_CLIP_PLANE0); clip_plane_0 ? glEnable(GL_CLIP_PLANE0) : glDisable(GL_CLIP_PLANE0);
clip_plane_1 ? glEnable(GL_CLIP_PLANE1) : glDisable(GL_CLIP_PLANE1); clip_plane_1 ? glEnable(GL_CLIP_PLANE1) : glDisable(GL_CLIP_PLANE1);
@ -1760,6 +1760,24 @@ void GLGSRender::ColorMask(bool a, bool r, bool g, bool b)
checkForGlError("glColorMask"); checkForGlError("glColorMask");
} }
void GLGSRender::AlphaFunc(u32 func, float ref)
{
glAlphaFunc(func, ref);
checkForGlError("glAlphaFunc");
}
void GLGSRender::DepthFunc(u32 func)
{
glDepthFunc(func);
checkForGlError("glDepthFunc");
}
void GLGSRender::DepthMask(u32 flag)
{
glDepthMask(flag);
checkForGlError("glDepthMask");
}
void GLGSRender::ExecCMD() void GLGSRender::ExecCMD()
{ {
if (!LoadProgram()) if (!LoadProgram())
@ -1878,18 +1896,6 @@ void GLGSRender::ExecCMD()
checkForGlError("glShadeModel"); checkForGlError("glShadeModel");
} }
if (m_set_depth_mask)
{
glDepthMask(m_depth_mask);
checkForGlError("glDepthMask");
}
if (m_set_depth_func)
{
glDepthFunc(m_depth_func);
checkForGlError("glDepthFunc");
}
if (m_set_depth_bounds) if (m_set_depth_bounds)
{ {
glDepthBoundsEXT(m_depth_bounds_min, m_depth_bounds_max); glDepthBoundsEXT(m_depth_bounds_min, m_depth_bounds_max);
@ -1950,12 +1956,6 @@ void GLGSRender::ExecCMD()
checkForGlError("glFrontFace"); checkForGlError("glFrontFace");
} }
if (m_set_alpha_func && m_set_alpha_ref)
{
glAlphaFunc(m_alpha_func, m_alpha_ref);
checkForGlError("glAlphaFunc");
}
if (m_set_fog_mode) if (m_set_fog_mode)
{ {
glFogi(GL_FOG_MODE, m_fog_mode); glFogi(GL_FOG_MODE, m_fog_mode);

3
rpcs3/Emu/RSX/GL/GLGSRender.h
View file

@ -196,5 +196,8 @@ protected:
virtual void ClearDepth(u32 depth); virtual void ClearDepth(u32 depth);
virtual void ClearSurface(u32 mask); virtual void ClearSurface(u32 mask);
virtual void ColorMask(bool a, bool r, bool g, bool b); virtual void ColorMask(bool a, bool r, bool g, bool b);
virtual void AlphaFunc(u32 func, float ref);
virtual void DepthFunc(u32 func);
virtual void DepthMask(u32 flag);
virtual void Flip(); virtual void Flip();
}; };

12
rpcs3/Emu/RSX/Null/NullGSRender.h
View file

@ -59,6 +59,18 @@ private:
{ {
} }
virtual void AlphaFunc(u32 func, float ref)
{
}
virtual void DepthFunc(u32 func)
{
}
virtual void DepthMask(u32 flag)
{
}
virtual void Flip() virtual void Flip()
{ {
} }

100
rpcs3/Emu/RSX/RSXThread.cpp
View file

@ -557,42 +557,49 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Alpha testing // Alpha testing
case NV4097_SET_ALPHA_TEST_ENABLE: case NV4097_SET_ALPHA_TEST_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
case NV4097_SET_ALPHA_FUNC: case NV4097_SET_ALPHA_FUNC:
{ {
m_set_alpha_func = true; const u32 value = ARGS(0);
m_alpha_func = ARGS(0); m_alpha_func = value;
if (count == 2) // Sanity check here for invalid alpha func
if (m_alpha_func)
{ {
m_set_alpha_ref = true; AlphaFunc(m_alpha_func, m_alpha_ref);
const u32 a1 = ARGS(1);
m_alpha_ref = (float&)a1;
} }
} }
break; break;
case NV4097_SET_ALPHA_REF: case NV4097_SET_ALPHA_REF:
{ {
m_set_alpha_ref = true; const u32 value = ARGS(0);
const u32 a0 = ARGS(0); m_alpha_ref = (float&)value;
m_alpha_ref = (float&)a0;
// Sanity check here for invalid alpha func
if (m_alpha_func)
{
AlphaFunc(m_alpha_func, m_alpha_ref);
}
} }
break; break;
// Cull face // Cull face
case NV4097_SET_CULL_FACE_ENABLE: case NV4097_SET_CULL_FACE_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
case NV4097_SET_CULL_FACE: case NV4097_SET_CULL_FACE:
{ {
m_cull_face = ARGS(0); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
@ -606,7 +613,8 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Blending // Blending
case NV4097_SET_BLEND_ENABLE: case NV4097_SET_BLEND_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
@ -680,7 +688,8 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Depth bound testing // Depth bound testing
case NV4097_SET_DEPTH_BOUNDS_TEST_ENABLE: case NV4097_SET_DEPTH_BOUNDS_TEST_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
@ -769,21 +778,26 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Depth testing // Depth testing
case NV4097_SET_DEPTH_TEST_ENABLE: case NV4097_SET_DEPTH_TEST_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
case NV4097_SET_DEPTH_FUNC: case NV4097_SET_DEPTH_FUNC:
{ {
m_set_depth_func = true; const u32 value = ARGS(0);
m_depth_func = ARGS(0); // Sanity check here for invalid depth func
if (value)
{
DepthFunc(value);
}
} }
break; break;
case NV4097_SET_DEPTH_MASK: case NV4097_SET_DEPTH_MASK:
{ {
m_set_depth_mask = true; const u32 value = ARGS(0);
m_depth_mask = ARGS(0); DepthMask(value);
} }
break; break;
@ -810,19 +824,21 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_POLY_OFFSET_LINE_ENABLE: case NV4097_SET_POLY_OFFSET_LINE_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
case NV4097_SET_POLY_OFFSET_POINT_ENABLE: case NV4097_SET_POLY_OFFSET_POINT_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
case NV4097_SET_POLYGON_OFFSET_SCALE_FACTOR: case NV4097_SET_POLYGON_OFFSET_SCALE_FACTOR:
{ {
m_set_depth_test = true; Enable(NV4097_SET_DEPTH_TEST_ENABLE, 1);
m_set_poly_offset_mode = true; m_set_poly_offset_mode = true;
const u32 a0 = ARGS(0); const u32 a0 = ARGS(0);
@ -838,7 +854,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_POLYGON_OFFSET_BIAS: case NV4097_SET_POLYGON_OFFSET_BIAS:
{ {
m_set_depth_test = true; Enable(NV4097_SET_DEPTH_TEST_ENABLE, 1);
m_set_poly_offset_mode = true; m_set_poly_offset_mode = true;
const u32 a0 = ARGS(0); const u32 a0 = ARGS(0);
@ -1218,7 +1234,8 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Logic Ops // Logic Ops
case NV4097_SET_LOGIC_OP_ENABLE: case NV4097_SET_LOGIC_OP_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
@ -1231,13 +1248,15 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Dithering // Dithering
case NV4097_SET_DITHER_ENABLE: case NV4097_SET_DITHER_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
// Stencil testing // Stencil testing
case NV4097_SET_STENCIL_TEST_ENABLE: case NV4097_SET_STENCIL_TEST_ENABLE:
{ {
const u32 value = ARGS(0);
Enable(cmd, ARGS(0)); Enable(cmd, ARGS(0));
} }
break; break;
@ -1384,7 +1403,8 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Primitive restart index // Primitive restart index
case NV4097_SET_RESTART_INDEX_ENABLE: case NV4097_SET_RESTART_INDEX_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
@ -1415,7 +1435,8 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_POINT_SPRITE_CONTROL: case NV4097_SET_POINT_SPRITE_CONTROL:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
// TODO: // TODO:
//(cmd)[1] = CELL_GCM_ENDIAN_SWAP((enable) | ((rmode) << 1) | (texcoordMask)); //(cmd)[1] = CELL_GCM_ENDIAN_SWAP((enable) | ((rmode) << 1) | (texcoordMask));
@ -1425,7 +1446,8 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Lighting // Lighting
case NV4097_SET_SPECULAR_ENABLE: case NV4097_SET_SPECULAR_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
@ -1683,13 +1705,15 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Line/Polygon smoothing // Line/Polygon smoothing
case NV4097_SET_LINE_SMOOTH_ENABLE: case NV4097_SET_LINE_SMOOTH_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
case NV4097_SET_POLY_SMOOTH_ENABLE: case NV4097_SET_POLY_SMOOTH_ENABLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
@ -1705,7 +1729,8 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Line/Polygon stipple // Line/Polygon stipple
case NV4097_SET_LINE_STIPPLE: case NV4097_SET_LINE_STIPPLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
@ -1720,7 +1745,8 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
case NV4097_SET_POLYGON_STIPPLE: case NV4097_SET_POLYGON_STIPPLE:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;
@ -1736,10 +1762,9 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Zcull // Zcull
case NV4097_SET_ZCULL_EN: case NV4097_SET_ZCULL_EN:
{ {
const u32 a0 = ARGS(0); const u32 value = ARGS(0);
Enable(NV4097_SET_DEPTH_TEST_ENABLE, value & 0x1);
m_set_depth_test = a0 & 0x1 ? true : false; Enable(NV4097_SET_STENCIL_TEST_ENABLE, value & 0x2);
m_set_stencil_test = a0 & 0x2 ? true : false;
} }
break; break;
@ -1836,7 +1861,8 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
// Clip Plane // Clip Plane
case NV4097_SET_USER_CLIP_PLANE_CONTROL: case NV4097_SET_USER_CLIP_PLANE_CONTROL:
{ {
Enable(cmd, ARGS(0)); const u32 value = ARGS(0);
Enable(cmd, value);
} }
break; break;

5
rpcs3/Emu/RSX/RSXThread.h
View file

@ -496,7 +496,7 @@ protected:
m_front_face = 0x0901; // GL_CCW m_front_face = 0x0901; // GL_CCW
m_cull_face = 0x0405; // GL_BACK m_cull_face = 0x0405; // GL_BACK
m_alpha_func = 0x0207; // GL_ALWAYS m_alpha_func = 0x0207; // GL_ALWAYS
m_alpha_ref = 0; m_alpha_ref = 0.0;
m_logic_op = 0x1503; // GL_COPY m_logic_op = 0x1503; // GL_COPY
m_shade_mode = 0x1D01; // GL_SMOOTH m_shade_mode = 0x1D01; // GL_SMOOTH
m_depth_mask = 1; m_depth_mask = 1;
@ -638,6 +638,9 @@ protected:
virtual void ClearDepth(u32 depth) = 0; virtual void ClearDepth(u32 depth) = 0;
virtual void ClearSurface(u32 mask) = 0; virtual void ClearSurface(u32 mask) = 0;
virtual void ColorMask(bool a, bool r, bool g, bool b) = 0; virtual void ColorMask(bool a, bool r, bool g, bool b) = 0;
virtual void AlphaFunc(u32 func, float ref) = 0;
virtual void DepthFunc(u32 func) = 0;
virtual void DepthMask(u32 flag) = 0;
virtual void Flip() = 0; virtual void Flip() = 0;
void LoadVertexData(u32 first, u32 count) void LoadVertexData(u32 first, u32 count)