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rsx: Fix intra-draw-call barrier queueing

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- Ignore latch since we may have another barrier queued. Barriers cost essentially nothing so there is no problem with extra pushes.
- Remove unnecessary use of "else" statements.
This commit is contained in:
kd-11 2024-04-16 03:38:46 +03:00 • committed by kd-11
parent 54ab16ab35
commit 1792714901
2 changed files with 21 additions and 23 deletions
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9
rpcs3/Emu/RSX/NV47/HW/common.cpp
View file

@ -30,11 +30,10 @@ namespace rsx
REGS(ctx)->register_vertex_info[attrib_index].data[channel_select] = value; REGS(ctx)->register_vertex_info[attrib_index].data[channel_select] = value;
} }
void push_draw_parameter_change(rsx::context* ctx, rsx::command_barrier_type /*type*/, u32 reg, u32 arg) void push_draw_parameter_change(rsx::context* ctx, rsx::command_barrier_type type, u32 reg, u32 arg)
{ {
if (REGS(ctx)->latch == arg || // NOTE: We can't test against latch here, since a previous change may be buffered in a pending barrier.
!RSX(ctx)->in_begin_end || if (!RSX(ctx)->in_begin_end || REGS(ctx)->current_draw_clause.empty())
REGS(ctx)->current_draw_clause.empty())
{ {
return; return;
} }
@ -43,7 +42,7 @@ namespace rsx
REGS(ctx)->decode(reg, REGS(ctx)->latch); REGS(ctx)->decode(reg, REGS(ctx)->latch);
// Insert barrier to reinsert the value later // Insert barrier to reinsert the value later
REGS(ctx)->current_draw_clause.insert_command_barrier(index_base_modifier_barrier, arg); REGS(ctx)->current_draw_clause.insert_command_barrier(type, arg);
} }
u32 get_report_data_impl([[maybe_unused]] rsx::context* ctx, u32 offset) u32 get_report_data_impl([[maybe_unused]] rsx::context* ctx, u32 offset)

35
rpcs3/Emu/RSX/NV47/HW/nv4097.cpp
View file

@ -187,12 +187,12 @@ namespace rsx
if (REGS(ctx)->decode<NV4097_SET_COLOR_MASK>(arg).is_invalid()) [[ unlikely ]] if (REGS(ctx)->decode<NV4097_SET_COLOR_MASK>(arg).is_invalid()) [[ unlikely ]]
{ {
// Rollback
REGS(ctx)->decode(reg, REGS(ctx)->latch); REGS(ctx)->decode(reg, REGS(ctx)->latch);
return;
} }
else
{ set_surface_options_dirty_bit(ctx, reg, arg);
set_surface_options_dirty_bit(ctx, reg, arg);
}
} }
void set_stencil_op(context* ctx, u32 reg, u32 arg) void set_stencil_op(context* ctx, u32 reg, u32 arg)
@ -202,15 +202,14 @@ namespace rsx
return; return;
} }
const auto typed = to_stencil_op(arg); if (to_stencil_op(arg)) [[ likely ]]
if (typed) [[ likely ]]
{ {
set_surface_options_dirty_bit(ctx, reg, arg); set_surface_options_dirty_bit(ctx, reg, arg);
return;
} }
else
{ // Rollback
REGS(ctx)->decode(reg, REGS(ctx)->latch); REGS(ctx)->decode(reg, REGS(ctx)->latch);
}
} }
///// Draw call setup (vertex, etc) ///// Draw call setup (vertex, etc)
@ -415,11 +414,11 @@ namespace rsx
to_blend_equation((arg >> 16) & 0xFFFF)) [[ likely ]] to_blend_equation((arg >> 16) & 0xFFFF)) [[ likely ]]
{ {
RSX(ctx)->m_graphics_state |= rsx::pipeline_config_dirty; RSX(ctx)->m_graphics_state |= rsx::pipeline_config_dirty;
return;
} }
else
{ // Rollback
REGS(ctx)->decode(reg, REGS(ctx)->latch); REGS(ctx)->decode(reg, REGS(ctx)->latch);
}
} }
void set_blend_factor(context* ctx, u32 reg, u32 arg) void set_blend_factor(context* ctx, u32 reg, u32 arg)
@ -433,11 +432,11 @@ namespace rsx
to_blend_factor((arg >> 16) & 0xFFFF)) [[ likely ]] to_blend_factor((arg >> 16) & 0xFFFF)) [[ likely ]]
{ {
RSX(ctx)->m_graphics_state |= rsx::pipeline_config_dirty; RSX(ctx)->m_graphics_state |= rsx::pipeline_config_dirty;
return;
} }
else
{ // Rollback
REGS(ctx)->decode(reg, REGS(ctx)->latch); REGS(ctx)->decode(reg, REGS(ctx)->latch);
}
} }
///// Reports ///// Reports