From 160ddcf86b8252821a402c9961f60b25e56bd3b0 Mon Sep 17 00:00:00 2001
From: Eladash <elad3356p@gmail.com>
Date: Tue, 21 Jan 2020 14:55:07 +0200
Subject: [PATCH] SPU: Minor FREST bugfix

---
 rpcs3/Emu/Cell/SPUInterpreter.cpp | 12 ++++--------
 rpcs3/Emu/Cell/SPURecompiler.cpp  |  2 +-
 2 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/rpcs3/Emu/Cell/SPUInterpreter.cpp b/rpcs3/Emu/Cell/SPUInterpreter.cpp
index 2cdc597009..692c4f648f 100644
--- a/rpcs3/Emu/Cell/SPUInterpreter.cpp
+++ b/rpcs3/Emu/Cell/SPUInterpreter.cpp
@@ -1908,20 +1908,16 @@ bool spu_interpreter_precise::FREST(spu_thread& spu, spu_opcode_t op)
 	for (int i = 0; i < 4; i++)
 	{
 		const auto a = ra._f[i];
-		switch (fexpf(a))
-		{
-		case 0:
+		const int exp = fexpf(a);
+
+		if (exp == 0)
 		{
 			spu.fpscr.setDivideByZeroFlag(i);
 			res._f[i] = extended(std::signbit(a), 0x7FFFFF);
-			break;
 		}
-		case (0x7e800000 >> 23): // Special case for value not handled properly in rcpps
+		else if (exp >= (0x7e800000 >> 23)) // Special case for values not handled properly in rcpps
 		{
 			res._f[i] = 0.0f;
-			break;
-		}
-		default: break;
 		}
 	}
 
diff --git a/rpcs3/Emu/Cell/SPURecompiler.cpp b/rpcs3/Emu/Cell/SPURecompiler.cpp
index 549ce2c184..576237fd72 100644
--- a/rpcs3/Emu/Cell/SPURecompiler.cpp
+++ b/rpcs3/Emu/Cell/SPURecompiler.cpp
@@ -7225,7 +7225,7 @@ public:
 		{
 			const auto a = get_vr<f32[4]>(op.ra);
 			const auto mask_ov = sext<s32[4]>(bitcast<s32[4]>(fabs(a)) > splat<s32[4]>(0x7e7fffff));
-			const auto mask_de = eval(noncast<u32[4]>(sext<s32[4]>(fcmp_uno(a == fsplat<f32[4]>(0.)))) >> 1);
+			const auto mask_de = eval(noncast<u32[4]>(sext<s32[4]>(fcmp_ord(a == fsplat<f32[4]>(0.)))) >> 1);
 			set_vr(op.rt, (bitcast<s32[4]>(fre(a)) & ~mask_ov) | noncast<s32[4]>(mask_de));
 		}
 		else