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Implement the SRR0 register.
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2 changed files with 10 additions and 1 deletions
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@ -276,6 +276,7 @@ class SPUThread : public PPCThread
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public:
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u128 GPR[128]; // General-Purpose Registers
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SPU_FPSCR FPSCR;
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u32 SRR0;
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SPU_SNRConfig_hdr cfg; // Signal Notification Registers Configuration (OR-mode enabled: 0x1 for SNR1, 0x2 for SNR2)
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u64 R_ADDR; // reservation address
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