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Carry bit is now resident in a register-allocated GPR instead of being backed directly into IML instructions All the PowerPC carry ADD* and SUB* instructions as well as SRAW/SRAWI have been reworked to use more generalized IML instructions for handling carry IML instructions now support two named output registers instead of only one (easily extendable to arbitrary count) |
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ACR | ||
AI | ||
Common | ||
Espresso | ||
Latte | ||
MMU | ||
SI | ||
VI |