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300 lines
12 KiB
C
300 lines
12 KiB
C
#pragma once
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#include "Cafe/HW/Espresso/PPCState.h"
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// SPR constants
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#define SPR_XER 1
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#define SPR_LR 8
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#define SPR_CTR 9
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#define SPR_DEC 22
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#define SPR_SRR0 26
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#define SPR_SRR1 27
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#define SPR_HID0 1008
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#define SPR_HID1 1009
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#define SPR_HID2 920
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#define SPR_TBL 268
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#define SPR_TBU 269
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#define SPR_DMAU 922
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#define SPR_DMAL 923
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// graphics quantization registers
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#define SPR_GQR0 912
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#define SPR_GQR1 913
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#define SPR_GQR2 914
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#define SPR_GQR3 915
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#define SPR_GQR4 916
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#define SPR_GQR5 917
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#define SPR_GQR6 918
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#define SPR_GQR7 919
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// user graphics quantization registers
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#define SPR_UGQR0 896
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#define SPR_UGQR1 897
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#define SPR_UGQR2 898
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#define SPR_UGQR3 899
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#define SPR_UGQR4 900
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#define SPR_UGQR5 901
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#define SPR_UGQR6 902
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#define SPR_UGQR7 903
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#define SPR_FPECR 1022 // used by the OS to store values
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#define SPR_PVR 287 // processor version, for Wii U this must be 0x7001xxxx - this register is only readable
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#define SPR_UPIR 1007 // core index
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#define SPR_SCR 947 // core control
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#define SPR_SDR1 25
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// reversed CR bit indices
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#define CR_BIT_LT 0
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#define CR_BIT_GT 1
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#define CR_BIT_EQ 2
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#define CR_BIT_SO 3
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#define XER_SO (1<<31) // summary overflow bit
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#define XER_OV (1<<30) // overflow bit
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#define XER_BIT_CA (29) // carry bit index. To accelerate frequent access, this bit is stored as a separate uint8
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// FPSCR
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#define FPSCR_VXSNAN (1<<24)
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#define FPSCR_VXVC (1<<19)
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#define MSR_SF (1<<31)
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#define MSR_UNKNOWN (1<<30)
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#define MSR_UNKNOWN2 (1<<27)
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#define MSR_VEC (1<<25)
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#define MSR_POW (1<<18)
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#define MSR_TGPR (1<<15)
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#define MSR_ILE (1<<16)
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#define MSR_EE (1<<15)
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#define MSR_PR (1<<14)
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#define MSR_FP (1<<13)
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#define MSR_ME (1<<12)
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#define MSR_FE0 (1<<11)
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#define MSR_SE (1<<10)
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#define MSR_BE (1<<9)
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#define MSR_FE1 (1<<8)
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#define MSR_IP (1<<6)
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#define MSR_IR (1<<5)
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#define MSR_DR (1<<4)
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#define MSR_PM (1<<2)
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#define MSR_RI (1<<1)
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#define MSR_LE (1)
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// helpers
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#define GET_MSR_BIT(__bit) ((hCPU->sprExtended.msr&(__bit))!=0)
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#define opHasRC() ((opcode & PPC_OPC_RC) != 0)
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// assume fixed values for PSE/LSQE. This optimization is possible because Wii U applications run only in user mode (todo - handle this correctly in LLE mode)
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//#define PPC_LSQE (hCPU->LSQE)
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//#define PPC_PSE (hCPU->PSE)
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#define PPC_LSQE (1)
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#define PPC_PSE (1)
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#define PPC_ASSERT(v)
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#define PPC_OPC_RC 1
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#define PPC_OPC_OE (1<<10)
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#define PPC_OPC_LK 1
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#define PPC_OPC_AA (1<<1)
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#define PPC_OPC_TEMPL_A(opc, rD, rA, rB, rC) {rD=((opc)>>21)&0x1f;rA=((opc)>>16)&0x1f;rB=((opc)>>11)&0x1f;rC=((opc)>>6)&0x1f;}
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#define PPC_OPC_TEMPL_B(opc, BO, BI, BD) {BO=((opc)>>21)&0x1f;BI=((opc)>>16)&0x1f;BD=(uint32)(sint32)(sint16)((opc)&0xfffc);}
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#define PPC_OPC_TEMPL_D_SImm(opc, rD, rA, imm) {rD=((opc)>>21)&0x1f;rA=((opc)>>16)&0x1f;imm=(uint32)(sint32)(sint16)((opc)&0xffff);}
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#define PPC_OPC_TEMPL_D_UImm(opc, rD, rA, imm) {rD=((opc)>>21)&0x1f;rA=((opc)>>16)&0x1f;imm=(opc)&0xffff;}
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#define PPC_OPC_TEMPL_D_Shift16(opc, rD, rA, imm) {rD=((opc)>>21)&0x1f;rA=((opc)>>16)&0x1f;imm=(opc)<<16;}
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#define PPC_OPC_TEMPL_I(opc, LI) {LI=(opc)&0x3fffffc;if (LI&0x02000000) LI |= 0xfc000000;}
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#define PPC_OPC_TEMPL_M(opc, rS, rA, SH, MB, ME) {rS=((opc)>>21)&0x1f;rA=((opc)>>16)&0x1f;SH=((opc)>>11)&0x1f;MB=((opc)>>6)&0x1f;ME=((opc)>>1)&0x1f;}
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#define PPC_OPC_TEMPL_X(opc, rS, rA, rB) {rS=((opc)>>21)&0x1f;rA=((opc)>>16)&0x1f;rB=((opc)>>11)&0x1f;}
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#define PPC_OPC_TEMPL_XFX(opc, rS, CRM) {rS=((opc)>>21)&0x1f;CRM=((opc)>>12)&0xff;}
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#define PPC_OPC_TEMPL_XO(opc, rS, rA, rB) {rS=((opc)>>21)&0x1f;rA=((opc)>>16)&0x1f;rB=((opc)>>11)&0x1f;}
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#define PPC_OPC_TEMPL_XL(opc, BO, BI, BD) {BO=((opc)>>21)&0x1f;BI=((opc)>>16)&0x1f;BD=((opc)>>11)&0x1f;}
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#define PPC_OPC_TEMPL_XFL(opc, rB, FM) {rB=((opc)>>11)&0x1f;FM=((opc)>>17)&0xff;}
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#define PPC_OPC_TEMPL3_XO() sint32 rD, rA, rB; rD=((opcode)>>21)&0x1f;rA=((opcode)>>16)&0x1f;rB=((opcode)>>11)&0x1f
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#define PPC_OPC_TEMPL_X_CR() sint32 crD, crA, crB; crD=((opcode)>>21)&0x1f;crA=((opcode)>>16)&0x1f;crB=((opcode)>>11)&0x1f
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static inline void ppc_update_cr0(PPCInterpreter_t* hCPU, uint32 r)
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{
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hCPU->cr[CR_BIT_SO] = (hCPU->spr.XER&XER_SO) ? 1 : 0;
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hCPU->cr[CR_BIT_LT] = ((r != 0) ? 1 : 0) & ((r & 0x80000000) ? 1 : 0);
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hCPU->cr[CR_BIT_EQ] = (r == 0);
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hCPU->cr[CR_BIT_GT] = hCPU->cr[CR_BIT_EQ] ^ hCPU->cr[CR_BIT_LT] ^ 1; // this works because EQ and LT can never be set at the same time. So the only case where GT becomes 1 is when LT=0 and EQ=0
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}
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static inline uint8 ppc_getCRBit(PPCInterpreter_t* hCPU, uint32 r)
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{
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return hCPU->cr[r];
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}
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static inline bool ppc_MTCRFMaskHasCRFieldSet(const uint32 mtcrfMask, const uint32 crIndex)
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{
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// 1000 0000 (0x80) -> cr0
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// 0000 0001 (0x01) -> cr7
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return (mtcrfMask & (1 << (7 - crIndex))) != 0;
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}
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// returns CR mask with CR0.LT in LSB
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static inline uint32 ppc_MTCRFMaskToCRBitMask(const uint32 mtcrfMask)
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{
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uint32 crMask = 0;
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for (uint32 crF = 0; crF < 8; crF++)
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{
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if (ppc_MTCRFMaskHasCRFieldSet(mtcrfMask, crF))
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crMask |= (0xF << (crF * 4));
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}
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return crMask;
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}
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static inline void ppc_setCRBit(PPCInterpreter_t* hCPU, uint32 r, uint8 v)
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{
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hCPU->cr[r] = v;
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}
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static inline void ppc_setCR(PPCInterpreter_t* hCPU, uint32 cr)
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{
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uint32 tempCr = cr;
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for (sint32 i = 31; i >= 0; i--)
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{
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ppc_setCRBit(hCPU, i, tempCr & 1);
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tempCr >>= 1;
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}
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}
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static inline uint32 ppc_getCR(PPCInterpreter_t* hCPU)
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{
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uint32 cr = 0;
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for (sint32 i = 0; i < 32; i++)
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{
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cr <<= 1;
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if (ppc_getCRBit(hCPU, i))
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cr |= 1;
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}
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return cr;
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}
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// FPU helper
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#define IS_NAN(X) ((((X) & 0x000fffffffffffffULL) != 0) && (((X) & 0x7ff0000000000000ULL) == 0x7ff0000000000000ULL))
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#define IS_QNAN(X) ((((X) & 0x000fffffffffffffULL) != 0) && (((X) & 0x7ff8000000000000ULL) == 0x7ff8000000000000ULL))
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#define IS_SNAN(X) ((((X) & 0x000fffffffffffffULL) != 0) && (((X) & 0x7ff8000000000000ULL) == 0x7ff0000000000000ULL))
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#define FPSCR_VE (1 << 7)
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inline double roundTo25BitAccuracy(double d)
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{
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uint64 v = *(uint64*)&d;
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v = (v & 0xFFFFFFFFF8000000ULL) + (v & 0x8000000ULL);
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return *(double*)&v;
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}
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double fres_espresso(double input);
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double frsqrte_espresso(double input);
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void fcmpu_espresso(PPCInterpreter_t* hCPU, int crfD, double a, double b);
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// OPC
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void PPCInterpreter_virtualHLE(PPCInterpreter_t* hCPU, unsigned int opcode);
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void PPCInterpreter_MFMSR(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_MTMSR(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_MFTB(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_MTFSB1X(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_MFCR(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_MCRF(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_MTCRF(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_MCRXR(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_TLBIE(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_TLBSYNC(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_DCBT(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_DCBST(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_DCBZL(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_DCBF(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_DCBI(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_DCBZ(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_ICBI(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_EIEIO(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_SC(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_SYNC(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_ISYNC(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_RFI(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_BX(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_BCX(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_BCLRX(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_BCCTR(PPCInterpreter_t* hCPU, uint32 Opcode);
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// FPU
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void PPCInterpreter_FCMPO(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FCMPU(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FMR(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FSEL(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FCTIWZ(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FCTIW(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FNEG(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FRSP(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FRSQRTE(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FRES(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FABS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FNABS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FADD(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FMUL(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FDIV(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FSUB(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FMADD(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FMSUB(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FMSUBS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FNMADD(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FNMSUB(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_MFFS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_MTFSF(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FDIVS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FMULS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FADDS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FSUBS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FMADDS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FNMADDS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_FNMSUBS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MERGE00(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MERGE01(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MERGE10(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MERGE11(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MR(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_NEG(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_ABS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_NABS(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_RES(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_RSQRTE(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_ADD(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_SUB(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MUL(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_DIV(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MADD(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_NMADD(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MADDS0(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MADDS1(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MSUB(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_NMSUB(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_SEL(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_SUM0(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_SUM1(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MULS0(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_MULS1(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_CMPO0(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_CMPU0(PPCInterpreter_t* hCPU, uint32 Opcode);
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void PPCInterpreter_PS_CMPU1(PPCInterpreter_t* hCPU, uint32 Opcode);
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