3 commits

Author	SHA1	Message	Date
Exzap	f94f99546d	PPCRec: Fixes and optimizations + rework FRES/FRSQRTE	2025-04-26 00:24:43 +02:00
Exzap	ce9a48b987	PPCRec: Rework CR bit handling ... CR bits are now resident in registers instead of being baked into the instruction definitions. Same for XER SO, and LWARX reservation EA and value. Reworked LWARX/STWCX, CRxx ops, compare and branch instructions. As well as RC bit handling. Not all CR-related instructions are reimplemented yet. Introduced atomic_cmp_store operation to allow implementing STWCX in architecture agnostic IML Removed legacy CR-based compare and jump operations	2025-04-26 00:22:36 +02:00
Exzap	d60742f52b	Add all the files	2022-08-22 22:21:23 +02:00