mirror of
https://github.com/cemu-project/Cemu.git
synced 2025-07-06 06:51:18 +12:00
PPCRec: Move debug printing + smaller clean up
This commit is contained in:
Exzap
parent
faf6c17438
commit
f95180d0fc
12 changed files with 520 additions and 582 deletions
|
|
@ -4,7 +4,6 @@
|
|||
#include "PPCRecompilerIml.h"
|
||||
#include "PPCRecompilerX64.h"
|
||||
#include "PPCRecompilerImlRanges.h"
|
||||
#include "util/helpers/StringBuf.h"
|
||||
|
||||
bool PPCRecompiler_decodePPCInstruction(ppcImlGenContext_t* ppcImlGenContext);
|
||||
uint32 PPCRecompiler_iterateCurrentInstruction(ppcImlGenContext_t* ppcImlGenContext);
|
||||
|
|
@ -25,40 +24,6 @@ IMLInstruction* PPCRecompilerImlGen_generateNewEmptyInstruction(ppcImlGenContext
|
|||
ppcImlGenContext->imlListCount++;
|
||||
return imlInstruction;
|
||||
}
|
||||
//
|
||||
//void PPCRecompilerImlGen_generateNewInstruction_jumpmark(ppcImlGenContext_t* ppcImlGenContext, uint32 address)
|
||||
//{
|
||||
// // no-op that indicates possible destination of a jump
|
||||
// IMLInstruction* imlInstruction = PPCRecompilerImlGen_generateNewEmptyInstruction(ppcImlGenContext);
|
||||
// imlInstruction->type = PPCREC_IML_TYPE_JUMPMARK;
|
||||
// imlInstruction->op_jumpmark.address = address;
|
||||
//}
|
||||
//
|
||||
//void PPCRecompilerImlGen_generateNewInstruction_macro(ppcImlGenContext_t* ppcImlGenContext, uint32 macroId, uint32 param, uint32 param2, uint16 paramU16)
|
||||
//{
|
||||
// // no-op that indicates possible destination of a jump
|
||||
// IMLInstruction* imlInstruction = PPCRecompilerImlGen_generateNewEmptyInstruction(ppcImlGenContext);
|
||||
// imlInstruction->type = PPCREC_IML_TYPE_MACRO;
|
||||
// imlInstruction->operation = macroId;
|
||||
// imlInstruction->op_macro.param = param;
|
||||
// imlInstruction->op_macro.param2 = param2;
|
||||
// imlInstruction->op_macro.paramU16 = paramU16;
|
||||
//}
|
||||
|
||||
///*
|
||||
// * Generates a marker for Interpreter -> Recompiler entrypoints
|
||||
// * PPC_ENTER iml instructions have no associated PPC address but the instruction itself has one
|
||||
// */
|
||||
//void PPCRecompilerImlGen_generateNewInstruction_ppcEnter(ppcImlGenContext_t* ppcImlGenContext, uint32 ppcAddress)
|
||||
//{
|
||||
// // no-op that indicates possible destination of a jump
|
||||
// IMLInstruction* imlInstruction = PPCRecompilerImlGen_generateNewEmptyInstruction(ppcImlGenContext);
|
||||
// imlInstruction->type = PPCREC_IML_TYPE_PPC_ENTER;
|
||||
// imlInstruction->operation = 0;
|
||||
// imlInstruction->op_ppcEnter.ppcAddress = ppcAddress;
|
||||
// imlInstruction->op_ppcEnter.x64Offset = 0;
|
||||
// imlInstruction->associatedPPCAddress = 0;
|
||||
//}
|
||||
|
||||
void PPCRecompilerImlGen_generateNewInstruction_r_r(ppcImlGenContext_t* ppcImlGenContext, IMLInstruction* imlInstruction, uint32 operation, uint8 registerResult, uint8 registerA, uint8 crRegister, uint8 crMode)
|
||||
{
|
||||
|
|
@ -2968,472 +2933,6 @@ uint32 PPCRecompiler_getPreviousInstruction(ppcImlGenContext_t* ppcImlGenContext
|
|||
return v;
|
||||
}
|
||||
|
||||
char _tempOpcodename[32];
|
||||
|
||||
const char* PPCRecompiler_getOpcodeDebugName(const IMLInstruction* iml)
|
||||
{
|
||||
uint32 op = iml->operation;
|
||||
if (op == PPCREC_IML_OP_ASSIGN)
|
||||
return "MOV";
|
||||
else if (op == PPCREC_IML_OP_ADD)
|
||||
return "ADD";
|
||||
else if (op == PPCREC_IML_OP_SUB)
|
||||
return "SUB";
|
||||
else if (op == PPCREC_IML_OP_ADD_CARRY_UPDATE_CARRY)
|
||||
return "ADDCSC";
|
||||
else if (op == PPCREC_IML_OP_OR)
|
||||
return "OR";
|
||||
else if (op == PPCREC_IML_OP_AND)
|
||||
return "AND";
|
||||
else if (op == PPCREC_IML_OP_XOR)
|
||||
return "XOR";
|
||||
else if (op == PPCREC_IML_OP_LEFT_SHIFT)
|
||||
return "LSH";
|
||||
else if (op == PPCREC_IML_OP_RIGHT_SHIFT)
|
||||
return "RSH";
|
||||
else if (op == PPCREC_IML_OP_MULTIPLY_SIGNED)
|
||||
return "MULS";
|
||||
else if (op == PPCREC_IML_OP_DIVIDE_SIGNED)
|
||||
return "DIVS";
|
||||
|
||||
sprintf(_tempOpcodename, "OP0%02x_T%d", iml->operation, iml->type);
|
||||
return _tempOpcodename;
|
||||
}
|
||||
|
||||
void PPCRecDebug_addRegisterParam(StringBuf& strOutput, sint32 virtualRegister, bool isLast = false)
|
||||
{
|
||||
if (isLast)
|
||||
{
|
||||
if (virtualRegister < 10)
|
||||
strOutput.addFmt("t{} ", virtualRegister);
|
||||
else
|
||||
strOutput.addFmt("t{}", virtualRegister);
|
||||
return;
|
||||
}
|
||||
if (virtualRegister < 10)
|
||||
strOutput.addFmt("t{} , ", virtualRegister);
|
||||
else
|
||||
strOutput.addFmt("t{}, ", virtualRegister);
|
||||
}
|
||||
|
||||
void PPCRecDebug_addS32Param(StringBuf& strOutput, sint32 val, bool isLast = false)
|
||||
{
|
||||
if (isLast)
|
||||
{
|
||||
strOutput.addFmt("0x{:08x}", val);
|
||||
return;
|
||||
}
|
||||
strOutput.addFmt("0x{:08x}, ", val);
|
||||
}
|
||||
|
||||
void PPCRecompilerDebug_printLivenessRangeInfo(StringBuf& currentLineText, IMLSegment* imlSegment, sint32 offset)
|
||||
{
|
||||
// pad to 70 characters
|
||||
sint32 index = currentLineText.getLen();
|
||||
while (index < 70)
|
||||
{
|
||||
debug_printf(" ");
|
||||
index++;
|
||||
}
|
||||
raLivenessSubrange_t* subrangeItr = imlSegment->raInfo.linkedList_allSubranges;
|
||||
while (subrangeItr)
|
||||
{
|
||||
if (offset == subrangeItr->start.index)
|
||||
{
|
||||
if (false)//subrange->isDirtied && i == subrange->becomesDirtyAtIndex.index)
|
||||
{
|
||||
debug_printf("*%-2d", subrangeItr->range->virtualRegister);
|
||||
}
|
||||
else
|
||||
{
|
||||
debug_printf("|%-2d", subrangeItr->range->virtualRegister);
|
||||
}
|
||||
}
|
||||
else if (false)//subrange->isDirtied && i == subrange->becomesDirtyAtIndex.index )
|
||||
{
|
||||
debug_printf("* ");
|
||||
}
|
||||
else if (offset >= subrangeItr->start.index && offset < subrangeItr->end.index)
|
||||
{
|
||||
debug_printf("| ");
|
||||
}
|
||||
else
|
||||
{
|
||||
debug_printf(" ");
|
||||
}
|
||||
index += 3;
|
||||
// next
|
||||
subrangeItr = subrangeItr->link_segmentSubrangesGPR.next;
|
||||
}
|
||||
}
|
||||
|
||||
void PPCRecompiler_dumpIMLSegment(IMLSegment* imlSegment, sint32 segmentIndex, bool printLivenessRangeInfo)
|
||||
{
|
||||
StringBuf strOutput(1024);
|
||||
|
||||
strOutput.addFmt("SEGMENT 0x{:04x} 0x{:08x} PPC 0x{:08x} - 0x{:08x} Loop-depth {}", segmentIndex, imlSegment->ppcAddress, imlSegment->ppcAddrMin, imlSegment->ppcAddrMax, imlSegment->loopDepth);
|
||||
if (imlSegment->isEnterable)
|
||||
{
|
||||
strOutput.addFmt(" ENTERABLE (0x{:08x})", imlSegment->enterPPCAddress);
|
||||
}
|
||||
else if( imlSegment->isJumpDestination )
|
||||
{
|
||||
strOutput.addFmt(" JUMP-DEST (0x{:08x})", imlSegment->jumpDestinationPPCAddress);
|
||||
}
|
||||
|
||||
debug_printf("%s\n", strOutput.c_str());
|
||||
|
||||
strOutput.reset();
|
||||
strOutput.addFmt("SEGMENT NAME 0x{:016x}", (uintptr_t)imlSegment);
|
||||
debug_printf("%s", strOutput.c_str());
|
||||
|
||||
if (printLivenessRangeInfo)
|
||||
{
|
||||
PPCRecompilerDebug_printLivenessRangeInfo(strOutput, imlSegment, RA_INTER_RANGE_START);
|
||||
}
|
||||
debug_printf("\n");
|
||||
|
||||
sint32 lineOffsetParameters = 18;
|
||||
|
||||
for(sint32 i=0; i<imlSegment->imlList.size(); i++)
|
||||
{
|
||||
const IMLInstruction& inst = imlSegment->imlList[i];
|
||||
// don't log NOP instructions unless they have an associated PPC address
|
||||
if(inst.type == PPCREC_IML_TYPE_NO_OP && inst.associatedPPCAddress == MPTR_NULL)
|
||||
continue;
|
||||
strOutput.reset();
|
||||
strOutput.addFmt("{:08x} ", inst.associatedPPCAddress);
|
||||
if( inst.type == PPCREC_IML_TYPE_R_NAME || inst.type == PPCREC_IML_TYPE_NAME_R)
|
||||
{
|
||||
if(inst.type == PPCREC_IML_TYPE_R_NAME)
|
||||
strOutput.add("LD_NAME");
|
||||
else
|
||||
strOutput.add("ST_NAME");
|
||||
while ((sint32)strOutput.getLen() < lineOffsetParameters)
|
||||
strOutput.add(" ");
|
||||
|
||||
PPCRecDebug_addRegisterParam(strOutput, inst.op_r_name.registerIndex);
|
||||
|
||||
strOutput.addFmt("name_{} (", inst.op_r_name.registerIndex, inst.op_r_name.name);
|
||||
if( inst.op_r_name.name >= PPCREC_NAME_R0 && inst.op_r_name.name < (PPCREC_NAME_R0+999) )
|
||||
{
|
||||
strOutput.addFmt("r{}", inst.op_r_name.name-PPCREC_NAME_R0);
|
||||
}
|
||||
else if( inst.op_r_name.name >= PPCREC_NAME_SPR0 && inst.op_r_name.name < (PPCREC_NAME_SPR0+999) )
|
||||
{
|
||||
strOutput.addFmt("spr{}", inst.op_r_name.name-PPCREC_NAME_SPR0);
|
||||
}
|
||||
else
|
||||
strOutput.add("ukn");
|
||||
strOutput.add(")");
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_R_R )
|
||||
{
|
||||
strOutput.addFmt("{}", PPCRecompiler_getOpcodeDebugName(&inst));
|
||||
while ((sint32)strOutput.getLen() < lineOffsetParameters)
|
||||
strOutput.add(" ");
|
||||
PPCRecDebug_addRegisterParam(strOutput, inst.op_r_r.registerResult);
|
||||
PPCRecDebug_addRegisterParam(strOutput, inst.op_r_r.registerA, true);
|
||||
|
||||
if( inst.crRegister != PPC_REC_INVALID_REGISTER )
|
||||
{
|
||||
strOutput.addFmt(" -> CR{}", inst.crRegister);
|
||||
}
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_R_R_R )
|
||||
{
|
||||
strOutput.addFmt("{}", PPCRecompiler_getOpcodeDebugName(&inst));
|
||||
while ((sint32)strOutput.getLen() < lineOffsetParameters)
|
||||
strOutput.add(" ");
|
||||
PPCRecDebug_addRegisterParam(strOutput, inst.op_r_r_r.registerResult);
|
||||
PPCRecDebug_addRegisterParam(strOutput, inst.op_r_r_r.registerA);
|
||||
PPCRecDebug_addRegisterParam(strOutput, inst.op_r_r_r.registerB, true);
|
||||
if( inst.crRegister != PPC_REC_INVALID_REGISTER )
|
||||
{
|
||||
strOutput.addFmt(" -> CR{}", inst.crRegister);
|
||||
}
|
||||
}
|
||||
else if (inst.type == PPCREC_IML_TYPE_R_R_S32)
|
||||
{
|
||||
strOutput.addFmt("{}", PPCRecompiler_getOpcodeDebugName(&inst));
|
||||
while ((sint32)strOutput.getLen() < lineOffsetParameters)
|
||||
strOutput.add(" ");
|
||||
|
||||
PPCRecDebug_addRegisterParam(strOutput, inst.op_r_r_s32.registerResult);
|
||||
PPCRecDebug_addRegisterParam(strOutput, inst.op_r_r_s32.registerA);
|
||||
PPCRecDebug_addS32Param(strOutput, inst.op_r_r_s32.immS32, true);
|
||||
|
||||
if (inst.crRegister != PPC_REC_INVALID_REGISTER)
|
||||
{
|
||||
strOutput.addFmt(" -> CR{}", inst.crRegister);
|
||||
}
|
||||
}
|
||||
else if (inst.type == PPCREC_IML_TYPE_R_S32)
|
||||
{
|
||||
strOutput.addFmt("{}", PPCRecompiler_getOpcodeDebugName(&inst));
|
||||
while ((sint32)strOutput.getLen() < lineOffsetParameters)
|
||||
strOutput.add(" ");
|
||||
|
||||
PPCRecDebug_addRegisterParam(strOutput, inst.op_r_immS32.registerIndex);
|
||||
PPCRecDebug_addS32Param(strOutput, inst.op_r_immS32.immS32, true);
|
||||
|
||||
if (inst.crRegister != PPC_REC_INVALID_REGISTER)
|
||||
{
|
||||
strOutput.addFmt(" -> CR{}", inst.crRegister);
|
||||
}
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_JUMPMARK )
|
||||
{
|
||||
strOutput.addFmt("jm_{:08x}:", inst.op_jumpmark.address);
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_PPC_ENTER )
|
||||
{
|
||||
strOutput.addFmt("ppcEnter_{:08x}:", inst.op_ppcEnter.ppcAddress);
|
||||
}
|
||||
else if(inst.type == PPCREC_IML_TYPE_LOAD || inst.type == PPCREC_IML_TYPE_STORE ||
|
||||
inst.type == PPCREC_IML_TYPE_LOAD_INDEXED || inst.type == PPCREC_IML_TYPE_STORE_INDEXED )
|
||||
{
|
||||
if(inst.type == PPCREC_IML_TYPE_LOAD || inst.type == PPCREC_IML_TYPE_LOAD_INDEXED)
|
||||
strOutput.add("LD_");
|
||||
else
|
||||
strOutput.add("ST_");
|
||||
|
||||
if (inst.op_storeLoad.flags2.signExtend)
|
||||
strOutput.add("S");
|
||||
else
|
||||
strOutput.add("U");
|
||||
strOutput.addFmt("{}", inst.op_storeLoad.copyWidth);
|
||||
|
||||
while ((sint32)strOutput.getLen() < lineOffsetParameters)
|
||||
strOutput.add(" ");
|
||||
|
||||
PPCRecDebug_addRegisterParam(strOutput, inst.op_storeLoad.registerData);
|
||||
|
||||
if(inst.type == PPCREC_IML_TYPE_LOAD_INDEXED || inst.type == PPCREC_IML_TYPE_STORE_INDEXED)
|
||||
strOutput.addFmt("[t{}+t{}]", inst.op_storeLoad.registerMem, inst.op_storeLoad.registerMem2);
|
||||
else
|
||||
strOutput.addFmt("[t{}+{}]", inst.op_storeLoad.registerMem, inst.op_storeLoad.immS32);
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_CJUMP )
|
||||
{
|
||||
if (inst.op_conditionalJump.condition == PPCREC_JUMP_CONDITION_E)
|
||||
strOutput.add("JE");
|
||||
else if (inst.op_conditionalJump.condition == PPCREC_JUMP_CONDITION_NE)
|
||||
strOutput.add("JNE");
|
||||
else if (inst.op_conditionalJump.condition == PPCREC_JUMP_CONDITION_G)
|
||||
strOutput.add("JG");
|
||||
else if (inst.op_conditionalJump.condition == PPCREC_JUMP_CONDITION_GE)
|
||||
strOutput.add("JGE");
|
||||
else if (inst.op_conditionalJump.condition == PPCREC_JUMP_CONDITION_L)
|
||||
strOutput.add("JL");
|
||||
else if (inst.op_conditionalJump.condition == PPCREC_JUMP_CONDITION_LE)
|
||||
strOutput.add("JLE");
|
||||
else if (inst.op_conditionalJump.condition == PPCREC_JUMP_CONDITION_NONE)
|
||||
strOutput.add("JALW"); // jump always
|
||||
else
|
||||
cemu_assert_unimplemented();
|
||||
strOutput.addFmt(" jm_{:08x} (cr{})", inst.op_conditionalJump.jumpmarkAddress, inst.crRegister);
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_NO_OP )
|
||||
{
|
||||
strOutput.add("NOP");
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_MACRO )
|
||||
{
|
||||
if( inst.operation == PPCREC_IML_MACRO_BLR )
|
||||
{
|
||||
strOutput.addFmt("MACRO BLR 0x{:08x} cycles (depr): {}", inst.op_macro.param, (sint32)inst.op_macro.paramU16);
|
||||
}
|
||||
else if( inst.operation == PPCREC_IML_MACRO_BLRL )
|
||||
{
|
||||
strOutput.addFmt("MACRO BLRL 0x{:08x} cycles (depr): {}", inst.op_macro.param, (sint32)inst.op_macro.paramU16);
|
||||
}
|
||||
else if( inst.operation == PPCREC_IML_MACRO_BCTR )
|
||||
{
|
||||
strOutput.addFmt("MACRO BCTR 0x{:08x} cycles (depr): {}", inst.op_macro.param, (sint32)inst.op_macro.paramU16);
|
||||
}
|
||||
else if( inst.operation == PPCREC_IML_MACRO_BCTRL )
|
||||
{
|
||||
strOutput.addFmt("MACRO BCTRL 0x{:08x} cycles (depr): {}", inst.op_macro.param, (sint32)inst.op_macro.paramU16);
|
||||
}
|
||||
else if( inst.operation == PPCREC_IML_MACRO_BL )
|
||||
{
|
||||
strOutput.addFmt("MACRO BL 0x{:08x} -> 0x{:08x} cycles (depr): {}", inst.op_macro.param, inst.op_macro.param2, (sint32)inst.op_macro.paramU16);
|
||||
}
|
||||
else if( inst.operation == PPCREC_IML_MACRO_B_FAR )
|
||||
{
|
||||
strOutput.addFmt("MACRO B_FAR 0x{:08x} -> 0x{:08x} cycles (depr): {}", inst.op_macro.param, inst.op_macro.param2, (sint32)inst.op_macro.paramU16);
|
||||
}
|
||||
else if( inst.operation == PPCREC_IML_MACRO_LEAVE )
|
||||
{
|
||||
strOutput.addFmt("MACRO LEAVE ppc: 0x{:08x}", inst.op_macro.param);
|
||||
}
|
||||
else if( inst.operation == PPCREC_IML_MACRO_HLE )
|
||||
{
|
||||
strOutput.addFmt("MACRO HLE ppcAddr: 0x{:08x} funcId: 0x{:08x}", inst.op_macro.param, inst.op_macro.param2);
|
||||
}
|
||||
else if( inst.operation == PPCREC_IML_MACRO_MFTB )
|
||||
{
|
||||
strOutput.addFmt("MACRO MFTB ppcAddr: 0x{:08x} sprId: 0x{:08x}", inst.op_macro.param, inst.op_macro.param2);
|
||||
}
|
||||
else if( inst.operation == PPCREC_IML_MACRO_COUNT_CYCLES )
|
||||
{
|
||||
strOutput.addFmt("MACRO COUNT_CYCLES cycles: {}", inst.op_macro.param);
|
||||
}
|
||||
else
|
||||
{
|
||||
strOutput.addFmt("MACRO ukn operation {}", inst.operation);
|
||||
}
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_FPR_R_NAME )
|
||||
{
|
||||
strOutput.addFmt("fpr_t{} = name_{} (", inst.op_r_name.registerIndex, inst.op_r_name.name);
|
||||
if( inst.op_r_name.name >= PPCREC_NAME_FPR0 && inst.op_r_name.name < (PPCREC_NAME_FPR0+999) )
|
||||
{
|
||||
strOutput.addFmt("fpr{}", inst.op_r_name.name-PPCREC_NAME_FPR0);
|
||||
}
|
||||
else if( inst.op_r_name.name >= PPCREC_NAME_TEMPORARY_FPR0 && inst.op_r_name.name < (PPCREC_NAME_TEMPORARY_FPR0+999) )
|
||||
{
|
||||
strOutput.addFmt("tempFpr{}", inst.op_r_name.name-PPCREC_NAME_TEMPORARY_FPR0);
|
||||
}
|
||||
else
|
||||
strOutput.add("ukn");
|
||||
strOutput.add(")");
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_FPR_NAME_R )
|
||||
{
|
||||
strOutput.addFmt("name_{} (", inst.op_r_name.name);
|
||||
if( inst.op_r_name.name >= PPCREC_NAME_FPR0 && inst.op_r_name.name < (PPCREC_NAME_FPR0+999) )
|
||||
{
|
||||
strOutput.addFmt("fpr{}", inst.op_r_name.name-PPCREC_NAME_FPR0);
|
||||
}
|
||||
else if( inst.op_r_name.name >= PPCREC_NAME_TEMPORARY_FPR0 && inst.op_r_name.name < (PPCREC_NAME_TEMPORARY_FPR0+999) )
|
||||
{
|
||||
strOutput.addFmt("tempFpr{}", inst.op_r_name.name-PPCREC_NAME_TEMPORARY_FPR0);
|
||||
}
|
||||
else
|
||||
strOutput.add("ukn");
|
||||
strOutput.addFmt(") = fpr_t{}", inst.op_r_name.registerIndex);
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_FPR_LOAD )
|
||||
{
|
||||
strOutput.addFmt("fpr_t{} = ", inst.op_storeLoad.registerData);
|
||||
if( inst.op_storeLoad.flags2.signExtend )
|
||||
strOutput.add("S");
|
||||
else
|
||||
strOutput.add("U");
|
||||
strOutput.addFmt("{} [t{}+{}] mode {}", inst.op_storeLoad.copyWidth / 8, inst.op_storeLoad.registerMem, inst.op_storeLoad.immS32, inst.op_storeLoad.mode);
|
||||
if (inst.op_storeLoad.flags2.notExpanded)
|
||||
{
|
||||
strOutput.addFmt(" <No expand>");
|
||||
}
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_FPR_STORE )
|
||||
{
|
||||
if( inst.op_storeLoad.flags2.signExtend )
|
||||
strOutput.add("S");
|
||||
else
|
||||
strOutput.add("U");
|
||||
strOutput.addFmt("{} [t{}+{}]", inst.op_storeLoad.copyWidth/8, inst.op_storeLoad.registerMem, inst.op_storeLoad.immS32);
|
||||
strOutput.addFmt("= fpr_t{} mode {}\n", inst.op_storeLoad.registerData, inst.op_storeLoad.mode);
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_FPR_R_R )
|
||||
{
|
||||
strOutput.addFmt("{:-6} ", PPCRecompiler_getOpcodeDebugName(&inst));
|
||||
strOutput.addFmt("fpr{:02d}, fpr{:02d}", inst.op_fpr_r_r.registerResult, inst.op_fpr_r_r.registerOperand);
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_FPR_R_R_R_R )
|
||||
{
|
||||
strOutput.addFmt("{:-6} ", PPCRecompiler_getOpcodeDebugName(&inst));
|
||||
strOutput.addFmt("fpr{:02d}, fpr{:02d}, fpr{:02d}, fpr{:02d}", inst.op_fpr_r_r_r_r.registerResult, inst.op_fpr_r_r_r_r.registerOperandA, inst.op_fpr_r_r_r_r.registerOperandB, inst.op_fpr_r_r_r_r.registerOperandC);
|
||||
}
|
||||
else if( inst.type == PPCREC_IML_TYPE_FPR_R_R_R )
|
||||
{
|
||||
strOutput.addFmt("{:-6} ", PPCRecompiler_getOpcodeDebugName(&inst));
|
||||
strOutput.addFmt("fpr{:02d}, fpr{:02d}, fpr{:02d}", inst.op_fpr_r_r_r.registerResult, inst.op_fpr_r_r_r.registerOperandA, inst.op_fpr_r_r_r.registerOperandB);
|
||||
}
|
||||
else if (inst.type == PPCREC_IML_TYPE_CJUMP_CYCLE_CHECK)
|
||||
{
|
||||
strOutput.addFmt("CYCLE_CHECK jm_{:08x}\n", inst.op_conditionalJump.jumpmarkAddress);
|
||||
}
|
||||
else if (inst.type == PPCREC_IML_TYPE_CONDITIONAL_R_S32)
|
||||
{
|
||||
strOutput.addFmt("t{} ", inst.op_conditional_r_s32.registerIndex);
|
||||
bool displayAsHex = false;
|
||||
if (inst.operation == PPCREC_IML_OP_ASSIGN)
|
||||
{
|
||||
displayAsHex = true;
|
||||
strOutput.add("=");
|
||||
}
|
||||
else
|
||||
strOutput.addFmt("(unknown operation CONDITIONAL_R_S32 {})", inst.operation);
|
||||
if (displayAsHex)
|
||||
strOutput.addFmt(" 0x{:x}", inst.op_conditional_r_s32.immS32);
|
||||
else
|
||||
strOutput.addFmt(" {}", inst.op_conditional_r_s32.immS32);
|
||||
strOutput.add(" (conditional)");
|
||||
if (inst.crRegister != PPC_REC_INVALID_REGISTER)
|
||||
{
|
||||
strOutput.addFmt(" -> and update CR{}", inst.crRegister);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
strOutput.addFmt("Unknown iml type {}", inst.type);
|
||||
}
|
||||
debug_printf("%s", strOutput.c_str());
|
||||
if (printLivenessRangeInfo)
|
||||
{
|
||||
PPCRecompilerDebug_printLivenessRangeInfo(strOutput, imlSegment, i);
|
||||
}
|
||||
debug_printf("\n");
|
||||
}
|
||||
// all ranges
|
||||
if (printLivenessRangeInfo)
|
||||
{
|
||||
debug_printf("Ranges-VirtReg ");
|
||||
raLivenessSubrange_t* subrangeItr = imlSegment->raInfo.linkedList_allSubranges;
|
||||
while(subrangeItr)
|
||||
{
|
||||
debug_printf("v%-2d", subrangeItr->range->virtualRegister);
|
||||
subrangeItr = subrangeItr->link_segmentSubrangesGPR.next;
|
||||
}
|
||||
debug_printf("\n");
|
||||
debug_printf("Ranges-PhysReg ");
|
||||
subrangeItr = imlSegment->raInfo.linkedList_allSubranges;
|
||||
while (subrangeItr)
|
||||
{
|
||||
debug_printf("p%-2d", subrangeItr->range->physicalRegister);
|
||||
subrangeItr = subrangeItr->link_segmentSubrangesGPR.next;
|
||||
}
|
||||
debug_printf("\n");
|
||||
}
|
||||
// branch info
|
||||
debug_printf("Links from: ");
|
||||
for (sint32 i = 0; i < imlSegment->list_prevSegments.size(); i++)
|
||||
{
|
||||
if (i)
|
||||
debug_printf(", ");
|
||||
debug_printf("%p", (void*)imlSegment->list_prevSegments[i]);
|
||||
}
|
||||
debug_printf("\n");
|
||||
debug_printf("Links to: ");
|
||||
if (imlSegment->nextSegmentBranchNotTaken)
|
||||
debug_printf("%p (no branch), ", (void*)imlSegment->nextSegmentBranchNotTaken);
|
||||
if (imlSegment->nextSegmentBranchTaken)
|
||||
debug_printf("%p (branch)", (void*)imlSegment->nextSegmentBranchTaken);
|
||||
debug_printf("\n");
|
||||
}
|
||||
|
||||
void PPCRecompiler_dumpIML(PPCRecFunction_t* PPCRecFunction, ppcImlGenContext_t* ppcImlGenContext)
|
||||
{
|
||||
for (size_t i = 0; i < ppcImlGenContext->segmentList2.size(); i++)
|
||||
{
|
||||
PPCRecompiler_dumpIMLSegment(ppcImlGenContext->segmentList2[i], i);
|
||||
debug_printf("\n");
|
||||
}
|
||||
}
|
||||
|
||||
void PPCRecompilerIml_setSegmentPoint(ppcRecompilerSegmentPoint_t* segmentPoint, IMLSegment* imlSegment, sint32 index)
|
||||
{
|
||||
segmentPoint->imlSegment = imlSegment;
|
||||
|
|
@ -3528,39 +3027,9 @@ void PPCRecompiler_freeContext(ppcImlGenContext_t* ppcImlGenContext)
|
|||
|
||||
for (IMLSegment* imlSegment : ppcImlGenContext->segmentList2)
|
||||
{
|
||||
//free(imlSegment->imlList);
|
||||
delete imlSegment;
|
||||
}
|
||||
ppcImlGenContext->segmentList2.clear();
|
||||
|
||||
//for(sint32 i=0; i<ppcImlGenContext->segmentListCount; i++)
|
||||
//{
|
||||
// free(ppcImlGenContext->segmentList[i]->imlList);
|
||||
// delete ppcImlGenContext->segmentList[i];
|
||||
//}
|
||||
//ppcImlGenContext->segmentListCount = 0;
|
||||
//if (ppcImlGenContext->segmentList)
|
||||
//{
|
||||
// free(ppcImlGenContext->segmentList);
|
||||
// ppcImlGenContext->segmentList = nullptr;
|
||||
//}
|
||||
}
|
||||
|
||||
bool PPCRecompiler_isSuffixInstruction(IMLInstruction* iml)
|
||||
{
|
||||
if (iml->type == PPCREC_IML_TYPE_MACRO && (iml->operation == PPCREC_IML_MACRO_BLR || iml->operation == PPCREC_IML_MACRO_BCTR) ||
|
||||
iml->type == PPCREC_IML_TYPE_MACRO && iml->operation == PPCREC_IML_MACRO_BL ||
|
||||
iml->type == PPCREC_IML_TYPE_MACRO && iml->operation == PPCREC_IML_MACRO_B_FAR ||
|
||||
iml->type == PPCREC_IML_TYPE_MACRO && iml->operation == PPCREC_IML_MACRO_BLRL ||
|
||||
iml->type == PPCREC_IML_TYPE_MACRO && iml->operation == PPCREC_IML_MACRO_BCTRL ||
|
||||
iml->type == PPCREC_IML_TYPE_MACRO && iml->operation == PPCREC_IML_MACRO_LEAVE ||
|
||||
iml->type == PPCREC_IML_TYPE_MACRO && iml->operation == PPCREC_IML_MACRO_HLE ||
|
||||
iml->type == PPCREC_IML_TYPE_MACRO && iml->operation == PPCREC_IML_MACRO_MFTB ||
|
||||
iml->type == PPCREC_IML_TYPE_PPC_ENTER ||
|
||||
iml->type == PPCREC_IML_TYPE_CJUMP ||
|
||||
iml->type == PPCREC_IML_TYPE_CJUMP_CYCLE_CHECK)
|
||||
return true;
|
||||
return false;
|
||||
}
|
||||
|
||||
bool PPCRecompiler_decodePPCInstruction(ppcImlGenContext_t* ppcImlGenContext)
|
||||
|
|
@ -4758,8 +4227,6 @@ bool PPCRecompiler_generateIntermediateCode(ppcImlGenContext_t& ppcImlGenContext
|
|||
memcpy(PPCRecompiler_appendInstruction(segIt), finalSegment->imlList.data() + f, sizeof(IMLInstruction));
|
||||
}
|
||||
finalSegment->imlList.clear();
|
||||
|
||||
//PPCRecompiler_dumpIML(ppcRecFunc, &ppcImlGenContext);
|
||||
}
|
||||
|
||||
// todo: If possible, merge with the segment following conditionalSegment (merging is only possible if the segment is not an entry point or has no other jump sources)
|
||||
|
|
@ -4820,7 +4287,6 @@ bool PPCRecompiler_generateIntermediateCode(ppcImlGenContext_t& ppcImlGenContext
|
|||
// All segments are considered to be part of the same PPC instruction range
|
||||
// The first segment also retains the jump destination and enterable properties from the original segment.
|
||||
//debug_printf("--- Insert cycle counter check ---\n");
|
||||
//PPCRecompiler_dumpIML(ppcRecFunc, &ppcImlGenContext);
|
||||
|
||||
PPCRecompilerIml_insertSegments(&ppcImlGenContext, s, 2);
|
||||
imlSegment = NULL;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue