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PPCRec: Dead code elimination + reintroduce pre-rework optimizations
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c419bfc451
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f55b842773
11 changed files with 930 additions and 316 deletions
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@ -82,6 +82,36 @@ X86Cond _x86Cond(IMLCondition imlCond)
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return X86_CONDITION_Z;
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}
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X86Cond _x86CondInverted(IMLCondition imlCond)
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{
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switch (imlCond)
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{
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case IMLCondition::EQ:
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return X86_CONDITION_NZ;
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case IMLCondition::NEQ:
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return X86_CONDITION_Z;
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case IMLCondition::UNSIGNED_GT:
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return X86_CONDITION_BE;
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case IMLCondition::UNSIGNED_LT:
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return X86_CONDITION_NB;
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case IMLCondition::SIGNED_GT:
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return X86_CONDITION_LE;
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case IMLCondition::SIGNED_LT:
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return X86_CONDITION_NL;
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default:
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break;
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}
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cemu_assert_suspicious();
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return X86_CONDITION_Z;
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}
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X86Cond _x86Cond(IMLCondition imlCond, bool condIsInverted)
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{
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if (condIsInverted)
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return _x86CondInverted(imlCond);
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return _x86Cond(imlCond);
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}
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/*
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* Remember current instruction output offset for reloc
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* The instruction generated after this method has been called will be adjusted
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@ -638,6 +668,10 @@ bool PPCRecompilerX64Gen_imlInstruction_r_r(PPCRecFunction_t* PPCRecFunction, pp
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PPCRecompilerX64Gen_redirectRelativeJump(x64GenContext, jumpInstructionOffset2, x64GenContext->emitter->GetWriteIndex());
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}
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}
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else if( imlInstruction->operation == PPCREC_IML_OP_X86_CMP)
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{
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x64GenContext->emitter->CMP_dd(regR, regA);
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}
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else if( imlInstruction->operation == PPCREC_IML_OP_DCBZ )
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{
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if( regR != regA )
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@ -680,6 +714,11 @@ bool PPCRecompilerX64Gen_imlInstruction_r_s32(PPCRecFunction_t* PPCRecFunction,
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cemu_assert_debug((imlInstruction->op_r_immS32.immS32 & 0x80) == 0);
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x64Gen_rol_reg64Low32_imm8(x64GenContext, regR, (uint8)imlInstruction->op_r_immS32.immS32);
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}
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else if( imlInstruction->operation == PPCREC_IML_OP_X86_CMP)
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{
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sint32 imm = imlInstruction->op_r_immS32.immS32;
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x64GenContext->emitter->CMP_di32(regR, imm);
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}
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else
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{
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debug_printf("PPCRecompilerX64Gen_imlInstruction_r_s32(): Unsupported operation 0x%x\n", imlInstruction->operation);
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@ -1082,6 +1121,13 @@ bool PPCRecompilerX64Gen_imlInstruction_cjump2(PPCRecFunction_t* PPCRecFunction,
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return true;
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}
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void PPCRecompilerX64Gen_imlInstruction_x86_eflags_jcc(PPCRecFunction_t* PPCRecFunction, ppcImlGenContext_t* ppcImlGenContext, x64GenContext_t* x64GenContext, IMLInstruction* imlInstruction, IMLSegment* imlSegment)
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{
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X86Cond cond = _x86Cond(imlInstruction->op_x86_eflags_jcc.cond, imlInstruction->op_x86_eflags_jcc.invertedCondition);
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PPCRecompilerX64Gen_rememberRelocatableOffset(x64GenContext, imlSegment->nextSegmentBranchTaken);
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x64GenContext->emitter->Jcc_j32(cond, 0);
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}
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bool PPCRecompilerX64Gen_imlInstruction_jump2(PPCRecFunction_t* PPCRecFunction, ppcImlGenContext_t* ppcImlGenContext, x64GenContext_t* x64GenContext, IMLInstruction* imlInstruction, IMLSegment* imlSegment)
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{
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PPCRecompilerX64Gen_rememberRelocatableOffset(x64GenContext, imlSegment->nextSegmentBranchTaken);
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@ -1504,6 +1550,10 @@ bool PPCRecompiler_generateX64Code(PPCRecFunction_t* PPCRecFunction, ppcImlGenCo
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if (PPCRecompilerX64Gen_imlInstruction_cjump2(PPCRecFunction, ppcImlGenContext, &x64GenContext, imlInstruction, segIt) == false)
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codeGenerationFailed = true;
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}
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else if(imlInstruction->type == PPCREC_IML_TYPE_X86_EFLAGS_JCC)
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{
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PPCRecompilerX64Gen_imlInstruction_x86_eflags_jcc(PPCRecFunction, ppcImlGenContext, &x64GenContext, imlInstruction, segIt);
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}
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else if (imlInstruction->type == PPCREC_IML_TYPE_JUMP)
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{
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if (PPCRecompilerX64Gen_imlInstruction_jump2(PPCRecFunction, ppcImlGenContext, &x64GenContext, imlInstruction, segIt) == false)
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