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PPCRec: Rework carry bit and generalize carry IML instructions
Carry bit is now resident in a register-allocated GPR instead of being backed directly into IML instructions All the PowerPC carry ADD* and SUB* instructions as well as SRAW/SRAWI have been reworked to use more generalized IML instructions for handling carry IML instructions now support two named output registers instead of only one (easily extendable to arbitrary count)
This commit is contained in:
Exzap
parent
84909d109f
commit
f305a2ba17
16 changed files with 3894 additions and 958 deletions
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@ -179,6 +179,39 @@ void PPCRecompilerImlGen_generateNewInstruction_memory_r_indexed(ppcImlGenContex
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imlInstruction->op_storeLoad.flags2.signExtend = signExtend;
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}
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// create and fill two segments (branch taken and branch not taken) as a follow up to the current segment and then merge flow afterwards
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template<typename F1n, typename F2n>
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void PPCIMLGen_CreateSegmentBranchedPath(ppcImlGenContext_t& ppcImlGenContext, PPCBasicBlockInfo& basicBlockInfo, F1n genSegmentBranchTaken, F2n genSegmentBranchNotTaken)
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{
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IMLSegment* currentWriteSegment = basicBlockInfo.GetSegmentForInstructionAppend();
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std::span<IMLSegment*> segments = ppcImlGenContext.InsertSegments(ppcImlGenContext.GetSegmentIndex(currentWriteSegment) + 1, 3);
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IMLSegment* segBranchNotTaken = segments[0];
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IMLSegment* segBranchTaken = segments[1];
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IMLSegment* segMerge = segments[2];
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// link the segments
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segMerge->SetLinkBranchTaken(currentWriteSegment->GetBranchTaken());
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segMerge->SetLinkBranchNotTaken(currentWriteSegment->GetBranchNotTaken());
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currentWriteSegment->SetLinkBranchTaken(segBranchTaken);
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currentWriteSegment->SetLinkBranchNotTaken(segBranchNotTaken);
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segBranchTaken->SetLinkBranchNotTaken(segMerge);
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segBranchNotTaken->SetLinkBranchTaken(segMerge);
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// generate code for branch taken segment
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ppcImlGenContext.currentOutputSegment = segBranchTaken;
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genSegmentBranchTaken(ppcImlGenContext);
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cemu_assert_debug(ppcImlGenContext.currentOutputSegment == segBranchTaken);
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// generate code for branch not taken segment
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ppcImlGenContext.currentOutputSegment = segBranchNotTaken;
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genSegmentBranchNotTaken(ppcImlGenContext);
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cemu_assert_debug(ppcImlGenContext.currentOutputSegment == segBranchNotTaken);
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ppcImlGenContext.emitInst().make_jump_new();
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// make merge segment the new write segment
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ppcImlGenContext.currentOutputSegment = segMerge;
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basicBlockInfo.appendSegment = segMerge;
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}
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uint32 PPCRecompilerImlGen_getAndLockFreeTemporaryGPR(ppcImlGenContext_t* ppcImlGenContext, uint32 mappedName)
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{
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if( mappedName == PPCREC_NAME_NONE )
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@ -782,96 +815,24 @@ bool PPCRecompilerImlGen_ADD(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode
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return true;
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}
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bool PPCRecompilerImlGen_ADDC(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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{
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sint32 rD, rA, rB;
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PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
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//hCPU->gpr[rD] = (int)hCPU->gpr[rA] + (int)hCPU->gpr[rB]; -> Update carry
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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uint32 registerRB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rB, false);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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ppcImlGenContext->emitInst().make_r_r_r(PPCREC_IML_OP_ADD_UPDATE_CARRY, registerRD, registerRA, registerRB);
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if ((opcode & PPC_OPC_RC))
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRD);
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return true;
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}
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bool PPCRecompilerImlGen_ADDE(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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{
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sint32 rD, rA, rB;
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PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
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// hCPU->gpr[rD] = hCPU->gpr[rA] + hCPU->gpr[rB] + ca;
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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uint32 registerRB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rB, false);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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ppcImlGenContext->emitInst().make_r_r_r(PPCREC_IML_OP_ADD_CARRY_UPDATE_CARRY, registerRD, registerRB, registerRA);
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if ((opcode & PPC_OPC_RC))
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRD);
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return true;
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}
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bool PPCRecompilerImlGen_ADDZE(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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{
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sint32 rD, rA, rB;
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PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
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PPC_ASSERT(rB == 0);
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//uint32 a = hCPU->gpr[rA];
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//uint32 ca = hCPU->xer_ca;
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//hCPU->gpr[rD] = a + ca;
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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// move rA to rD
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if( registerRA != registerRD )
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{
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ppcImlGenContext->emitInst().make_r_r(PPCREC_IML_OP_ASSIGN, registerRD, registerRA);
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}
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ppcImlGenContext->emitInst().make_r_r(PPCREC_IML_OP_ADD_CARRY, registerRD, registerRD);
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if ((opcode & PPC_OPC_RC))
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRD);
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return true;
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}
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bool PPCRecompilerImlGen_ADDME(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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{
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sint32 rD, rA, rB;
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PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
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PPC_ASSERT(rB == 0);
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//uint32 a = hCPU->gpr[rA];
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//uint32 ca = hCPU->xer_ca;
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//hCPU->gpr[rD] = a + ca + -1;
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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// move rA to rD
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if( registerRA != registerRD )
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{
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ppcImlGenContext->emitInst().make_r_r(PPCREC_IML_OP_ASSIGN, registerRD, registerRA);
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}
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ppcImlGenContext->emitInst().make_r_r(PPCREC_IML_OP_ADD_CARRY_ME, registerRD, registerRD);
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if ((opcode & PPC_OPC_RC))
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRD);
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return true;
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}
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bool PPCRecompilerImlGen_ADDI(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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{
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sint32 rD, rA;
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uint32 imm;
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PPC_OPC_TEMPL_D_SImm(opcode, rD, rA, imm);
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//hCPU->gpr[rD] = (rA ? (int)hCPU->gpr[rA] : 0) + (int)imm;
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if( rA != 0 )
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if (rA != 0)
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{
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA, false);
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// check if rD is already loaded, else use new temporary register
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
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ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_ADD, registerRD, registerRA, imm);
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}
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else
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{
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// rA not used, instruction is value assignment
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// rD = imm
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
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ppcImlGenContext->emitInst().make_r_s32(PPCREC_IML_OP_ASSIGN, registerRD, imm);
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}
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// never updates any cr
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@ -883,48 +844,93 @@ bool PPCRecompilerImlGen_ADDIS(ppcImlGenContext_t* ppcImlGenContext, uint32 opco
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int rD, rA;
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uint32 imm;
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PPC_OPC_TEMPL_D_Shift16(opcode, rD, rA, imm);
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if( rA != 0 )
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if (rA != 0)
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{
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA, false);
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// check if rD is already loaded, else use new temporary register
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
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ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_ADD, registerRD, registerRA, (sint32)imm);
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}
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else
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{
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// rA not used, instruction turns into simple value assignment
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// rD = imm
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
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ppcImlGenContext->emitInst().make_r_s32(PPCREC_IML_OP_ASSIGN, registerRD, (sint32)imm, PPC_REC_INVALID_REGISTER, 0);
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}
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// never updates any cr
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return true;
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}
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bool PPCRecompilerImlGen_ADDIC(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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bool PPCRecompilerImlGen_ADDC(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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{
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sint32 rD, rA;
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uint32 imm;
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PPC_OPC_TEMPL_D_SImm(opcode, rD, rA, imm);
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// rD = rA + imm;
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_ADD_UPDATE_CARRY, registerRD, registerRA, imm);
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// never updates any cr
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// r = a + b -> update carry
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sint32 rD, rA, rB;
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PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
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IMLReg regRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA, false);
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IMLReg regRB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rB, false);
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IMLReg regRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
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IMLReg regCa = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
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ppcImlGenContext->emitInst().make_r_r_r_carry(PPCREC_IML_OP_ADD, regRD, regRA, regRB, regCa);
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if (opcode & PPC_OPC_RC)
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, regRD);
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return true;
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}
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bool PPCRecompilerImlGen_ADDIC_(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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bool PPCRecompilerImlGen_ADDIC_(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode, bool updateCR0)
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{
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// this opcode is identical to ADDIC but additionally it updates CR0
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sint32 rD, rA;
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uint32 imm;
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PPC_OPC_TEMPL_D_SImm(opcode, rD, rA, imm);
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// rD = rA + imm;
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_ADD_UPDATE_CARRY, registerRD, registerRA, imm);
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRD);
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IMLReg regA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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IMLReg regD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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IMLReg regCa = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
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ppcImlGenContext->emitInst().make_r_r_s32_carry(PPCREC_IML_OP_ADD, regD, regA, (sint32)imm, regCa);
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if(updateCR0)
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, regD);
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return true;
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}
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bool PPCRecompilerImlGen_ADDE(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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{
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// r = a + b + carry -> update carry
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sint32 rD, rA, rB;
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PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
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IMLReg regRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA, false);
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IMLReg regRB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rB, false);
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IMLReg regRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
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IMLReg regCa = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
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ppcImlGenContext->emitInst().make_r_r_r_carry(PPCREC_IML_OP_ADD_WITH_CARRY, regRD, regRA, regRB, regCa);
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if (opcode & PPC_OPC_RC)
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, regRD);
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return true;
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}
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bool PPCRecompilerImlGen_ADDZE(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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{
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// r = a + carry -> update carry
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sint32 rD, rA, rB;
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PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
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IMLReg regRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA, false);
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IMLReg regRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
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IMLReg regCa = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
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ppcImlGenContext->emitInst().make_r_r_s32_carry(PPCREC_IML_OP_ADD_WITH_CARRY, regRD, regRA, 0, regCa);
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if (opcode & PPC_OPC_RC)
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, regRD);
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return true;
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}
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bool PPCRecompilerImlGen_ADDME(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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{
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// r = a + 0xFFFFFFFF + carry -> update carry
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sint32 rD, rA, rB;
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PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
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IMLReg regRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA, false);
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IMLReg regRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
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IMLReg regCa = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
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ppcImlGenContext->emitInst().make_r_r_s32_carry(PPCREC_IML_OP_ADD_WITH_CARRY, regRD, regRA, -1, regCa);
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if (opcode & PPC_OPC_RC)
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, regRD);
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return true;
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}
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@ -932,71 +938,80 @@ bool PPCRecompilerImlGen_SUBF(ppcImlGenContext_t* ppcImlGenContext, uint32 opcod
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{
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sint32 rD, rA, rB;
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PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
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// hCPU->gpr[rD] = ~hCPU->gpr[rA] + hCPU->gpr[rB] + 1;
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// rD = rB - rA
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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uint32 registerRB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rB, false);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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ppcImlGenContext->emitInst().make_r_r_r(PPCREC_IML_OP_SUB, registerRD, registerRB, registerRA);
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// rD = ~rA + rB + 1
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IMLReg regA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA, false);
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IMLReg regB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rB, false);
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IMLReg regD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
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ppcImlGenContext->emitInst().make_r_r_r(PPCREC_IML_OP_SUB, regD, regB, regA);
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if ((opcode & PPC_OPC_RC))
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRD);
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PPCImlGen_UpdateCR0Logical(ppcImlGenContext, regD);
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return true;
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}
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bool PPCRecompilerImlGen_SUBFE(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
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{
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// d = ~a + b + ca;
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sint32 rD, rA, rB;
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PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
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// hCPU->gpr[rD] = ~hCPU->gpr[rA] + hCPU->gpr[rB] + ca;
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uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
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uint32 registerRB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rB, false);
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uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
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ppcImlGenContext->emitInst().make_r_r_r(PPCREC_IML_OP_SUB_CARRY_UPDATE_CARRY, registerRD, registerRB, registerRA);
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||||
IMLReg regA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
|
||||
IMLReg regB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rB, false);
|
||||
IMLReg regD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
|
||||
IMLReg regTmp = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_TEMPORARY + 0);
|
||||
IMLReg regCa = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
|
||||
ppcImlGenContext->emitInst().make_r_r(PPCREC_IML_OP_NOT, regTmp, regA);
|
||||
ppcImlGenContext->emitInst().make_r_r_r_carry(PPCREC_IML_OP_ADD_WITH_CARRY, regD, regTmp, regB, regCa);
|
||||
if ((opcode & PPC_OPC_RC))
|
||||
PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRD);
|
||||
PPCImlGen_UpdateCR0Logical(ppcImlGenContext, regD);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool PPCRecompilerImlGen_SUBFZE(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
|
||||
{
|
||||
// d = ~a + ca;
|
||||
sint32 rD, rA, rB;
|
||||
PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
|
||||
if( rB != 0 )
|
||||
debugBreakpoint();
|
||||
uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
|
||||
uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
|
||||
ppcImlGenContext->emitInst().make_r_r(PPCREC_IML_OP_SUB_CARRY_UPDATE_CARRY, registerRD, registerRA);
|
||||
IMLReg regA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA, false);
|
||||
IMLReg regD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
|
||||
IMLReg regTmp = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_TEMPORARY + 0);
|
||||
IMLReg regCa = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
|
||||
ppcImlGenContext->emitInst().make_r_r(PPCREC_IML_OP_NOT, regTmp, regA);
|
||||
ppcImlGenContext->emitInst().make_r_r_s32_carry(PPCREC_IML_OP_ADD_WITH_CARRY, regD, regTmp, 0, regCa);
|
||||
if ((opcode & PPC_OPC_RC))
|
||||
PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRD);
|
||||
PPCImlGen_UpdateCR0Logical(ppcImlGenContext, regD);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool PPCRecompilerImlGen_SUBFC(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
|
||||
{
|
||||
// d = ~a + b + 1;
|
||||
sint32 rD, rA, rB;
|
||||
PPC_OPC_TEMPL_XO(opcode, rD, rA, rB);
|
||||
// hCPU->gpr[rD] = ~hCPU->gpr[rA] + hCPU->gpr[rB] + 1;
|
||||
// rD = rB - rA
|
||||
uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
|
||||
uint32 registerRB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rB, false);
|
||||
uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
|
||||
ppcImlGenContext->emitInst().make_r_r_r(PPCREC_IML_OP_SUBFC, registerRD, registerRA, registerRB);
|
||||
if (opcode & PPC_OPC_RC)
|
||||
PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRD);
|
||||
IMLReg regA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA, false);
|
||||
IMLReg regB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rB, false);
|
||||
IMLReg regD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
|
||||
IMLReg regTmp = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_TEMPORARY + 0);
|
||||
IMLReg regCa = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
|
||||
ppcImlGenContext->emitInst().make_r_r(PPCREC_IML_OP_NOT, regTmp, regA);
|
||||
ppcImlGenContext->emitInst().make_r_s32(PPCREC_IML_OP_ASSIGN, regCa, 1); // set input carry to simulate offset of 1
|
||||
ppcImlGenContext->emitInst().make_r_r_r_carry(PPCREC_IML_OP_ADD_WITH_CARRY, regD, regTmp, regB, regCa);
|
||||
if ((opcode & PPC_OPC_RC))
|
||||
PPCImlGen_UpdateCR0Logical(ppcImlGenContext, regD);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool PPCRecompilerImlGen_SUBFIC(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
|
||||
{
|
||||
// d = ~a + imm + 1
|
||||
sint32 rD, rA;
|
||||
uint32 imm;
|
||||
PPC_OPC_TEMPL_D_SImm(opcode, rD, rA, imm);
|
||||
//uint32 a = hCPU->gpr[rA];
|
||||
//hCPU->gpr[rD] = ~a + imm + 1;
|
||||
// cr0 is never affected
|
||||
uint32 registerRA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rA, false);
|
||||
uint32 registerRD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rD);
|
||||
ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_SUBFC, registerRD, registerRA, imm);
|
||||
IMLReg regA = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA, false);
|
||||
IMLReg regD = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rD);
|
||||
IMLReg regCa = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
|
||||
IMLReg regTmp = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_TEMPORARY + 0);
|
||||
ppcImlGenContext->emitInst().make_r_r(PPCREC_IML_OP_NOT, regTmp, regA);
|
||||
ppcImlGenContext->emitInst().make_r_r_s32_carry(PPCREC_IML_OP_ADD, regD, regTmp, (sint32)imm + 1, regCa);
|
||||
// never affects CR0
|
||||
return true;
|
||||
}
|
||||
|
||||
|
|
@ -1102,7 +1117,7 @@ bool PPCRecompilerImlGen_RLWINM(ppcImlGenContext_t* ppcImlGenContext, uint32 opc
|
|||
else if( SH == (32-MB) && ME == 31 )
|
||||
{
|
||||
// SRWI
|
||||
ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_RIGHT_SHIFT, registerRA, registerRS, MB);
|
||||
ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_RIGHT_SHIFT_U, registerRA, registerRS, MB);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -1152,14 +1167,45 @@ bool PPCRecompilerImlGen_RLWNM(ppcImlGenContext_t* ppcImlGenContext, uint32 opco
|
|||
|
||||
bool PPCRecompilerImlGen_SRAW(ppcImlGenContext_t* ppcImlGenContext, uint32 opcode)
|
||||
{
|
||||
// unlike SRAWI, for SRAW the shift range is 0-63 (6 bits)
|
||||
// but only shifts up to register bitwidth-1 are well defined in IML so this requires special handling for shifts >= 32
|
||||
sint32 rS, rA, rB;
|
||||
PPC_OPC_TEMPL_X(opcode, rS, rA, rB);
|
||||
uint32 registerRS = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rS, false);
|
||||
uint32 registerRB = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rB, false);
|
||||
uint32 registerRA = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rA);
|
||||
ppcImlGenContext->emitInst().make_r_r_r(PPCREC_IML_OP_SRAW, registerRA, registerRS, registerRB);
|
||||
if ((opcode & PPC_OPC_RC))
|
||||
PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRA);
|
||||
uint32 registerCarry = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
|
||||
|
||||
uint32 registerTmpShiftAmount = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_TEMPORARY + 0);
|
||||
uint32 registerTmpCondBool = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_TEMPORARY + 1);
|
||||
uint32 registerTmp1 = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_TEMPORARY + 2);
|
||||
uint32 registerTmp2 = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_TEMPORARY + 3);
|
||||
|
||||
// load masked shift factor into temporary register
|
||||
ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_AND, registerTmpShiftAmount, registerRB, 0x3F);
|
||||
ppcImlGenContext->emitInst().make_compare_s32(registerTmpShiftAmount, 32, registerTmpCondBool, IMLCondition::UNSIGNED_GT);
|
||||
ppcImlGenContext->emitInst().make_conditional_jump_new(registerTmpCondBool, true);
|
||||
|
||||
PPCIMLGen_CreateSegmentBranchedPath(*ppcImlGenContext, *ppcImlGenContext->currentBasicBlock,
|
||||
[&](ppcImlGenContext_t& genCtx)
|
||||
{
|
||||
/* branch taken */
|
||||
genCtx.emitInst().make_r_r_r(PPCREC_IML_OP_RIGHT_SHIFT_S, registerRA, registerRS, registerTmpShiftAmount);
|
||||
genCtx.emitInst().make_compare_s32(registerRA, 0, registerCarry, IMLCondition::NEQ); // if the sign bit is still set it also means it was shifted out and we can set carry
|
||||
},
|
||||
[&](ppcImlGenContext_t& genCtx)
|
||||
{
|
||||
/* branch not taken, shift size below 32 */
|
||||
genCtx.emitInst().make_r_r_s32(PPCREC_IML_OP_RIGHT_SHIFT_S, registerTmp1, registerRS, 31); // signMask = input >> 31 (arithmetic shift)
|
||||
genCtx.emitInst().make_r_s32(PPCREC_IML_OP_ASSIGN, registerTmp2, 1); // shiftMask = ((1<<SH)-1)
|
||||
genCtx.emitInst().make_r_r_r(PPCREC_IML_OP_LEFT_SHIFT, registerTmp2, registerTmp2, registerTmpShiftAmount);
|
||||
genCtx.emitInst().make_r_r_s32(PPCREC_IML_OP_SUB, registerTmp2, registerTmp2, 1);
|
||||
genCtx.emitInst().make_r_r_r(PPCREC_IML_OP_AND, registerTmp1, registerTmp1, registerTmp2); // signMask & shiftMask & input
|
||||
genCtx.emitInst().make_r_r_r(PPCREC_IML_OP_AND, registerTmp1, registerTmp1, registerRS);
|
||||
genCtx.emitInst().make_compare_s32(registerTmp1, 0, registerCarry, IMLCondition::NEQ);
|
||||
genCtx.emitInst().make_r_r_r(PPCREC_IML_OP_RIGHT_SHIFT_S, registerRA, registerRS, registerTmpShiftAmount);
|
||||
}
|
||||
);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
|
@ -1169,9 +1215,20 @@ bool PPCRecompilerImlGen_SRAWI(ppcImlGenContext_t* ppcImlGenContext, uint32 opco
|
|||
uint32 SH;
|
||||
PPC_OPC_TEMPL_X(opcode, rS, rA, SH);
|
||||
cemu_assert_debug(SH < 32);
|
||||
uint32 registerRS = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0+rS, false);
|
||||
uint32 registerRA = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0+rA);
|
||||
ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_SRAW, registerRA, registerRS, (sint32)SH);
|
||||
if (SH == 0)
|
||||
return false; // becomes a no-op but also sets ca bit to 0?
|
||||
uint32 registerRS = PPCRecompilerImlGen_loadRegister(ppcImlGenContext, PPCREC_NAME_R0 + rS, false);
|
||||
uint32 registerRA = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_R0 + rA);
|
||||
uint32 registerCarry = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_XER_CA);
|
||||
uint32 registerTmp = PPCRecompilerImlGen_loadOverwriteRegister(ppcImlGenContext, PPCREC_NAME_TEMPORARY + 0);
|
||||
// calculate CA first
|
||||
ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_RIGHT_SHIFT_S, registerTmp, registerRS, 31); // signMask = input >> 31 (arithmetic shift)
|
||||
ppcImlGenContext->emitInst().make_r_r_r(PPCREC_IML_OP_AND, registerTmp, registerTmp, registerRS); // testValue = input & signMask & ((1<<SH)-1)
|
||||
ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_AND, registerTmp, registerTmp, ((1 << SH) - 1));
|
||||
ppcImlGenContext->emitInst().make_compare_s32(registerTmp, 0, registerCarry, IMLCondition::NEQ); // ca = (testValue != 0)
|
||||
// do the actual shift
|
||||
ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_RIGHT_SHIFT_S, registerRA, registerRS, (sint32)SH);
|
||||
|
||||
if ((opcode & PPC_OPC_RC))
|
||||
PPCImlGen_UpdateCR0Logical(ppcImlGenContext, registerRA);
|
||||
return true;
|
||||
|
|
@ -1999,7 +2056,7 @@ bool PPCRecompilerImlGen_STSWI(ppcImlGenContext_t* ppcImlGenContext, uint32 opco
|
|||
ppcImlGenContext->emitInst().make_r_r(PPCREC_IML_OP_ASSIGN, tmpReg, dataRegister);
|
||||
sint32 shiftAmount = (3 - b) * 8;
|
||||
if (shiftAmount)
|
||||
ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_RIGHT_SHIFT, tmpReg, tmpReg, shiftAmount);
|
||||
ppcImlGenContext->emitInst().make_r_r_s32(PPCREC_IML_OP_RIGHT_SHIFT_U, tmpReg, tmpReg, shiftAmount);
|
||||
ppcImlGenContext->emitInst().make_memory_r(tmpReg, memReg, memOffset + b, 8, false);
|
||||
nb--;
|
||||
if (nb == 0)
|
||||
|
|
@ -2791,7 +2848,8 @@ bool PPCRecompiler_decodePPCInstruction(ppcImlGenContext_t* ppcImlGenContext)
|
|||
PPCRecompilerImlGen_MULLI(ppcImlGenContext, opcode);
|
||||
break;
|
||||
case 8: // SUBFIC
|
||||
PPCRecompilerImlGen_SUBFIC(ppcImlGenContext, opcode);
|
||||
if( !PPCRecompilerImlGen_SUBFIC(ppcImlGenContext, opcode) )
|
||||
unsupportedInstructionFound = true;
|
||||
break;
|
||||
case 10: // CMPLI
|
||||
PPCRecompilerImlGen_CMPLI(ppcImlGenContext, opcode);
|
||||
|
|
@ -2800,11 +2858,11 @@ bool PPCRecompiler_decodePPCInstruction(ppcImlGenContext_t* ppcImlGenContext)
|
|||
PPCRecompilerImlGen_CMPI(ppcImlGenContext, opcode);
|
||||
break;
|
||||
case 12: // ADDIC
|
||||
if (PPCRecompilerImlGen_ADDIC(ppcImlGenContext, opcode) == false)
|
||||
if (PPCRecompilerImlGen_ADDIC_(ppcImlGenContext, opcode, false) == false)
|
||||
unsupportedInstructionFound = true;
|
||||
break;
|
||||
case 13: // ADDIC.
|
||||
if (PPCRecompilerImlGen_ADDIC_(ppcImlGenContext, opcode) == false)
|
||||
if (PPCRecompilerImlGen_ADDIC_(ppcImlGenContext, opcode, true) == false)
|
||||
unsupportedInstructionFound = true;
|
||||
break;
|
||||
case 14: // ADDI
|
||||
|
|
@ -4010,36 +4068,6 @@ bool PPCRecompiler_generateIntermediateCode(ppcImlGenContext_t& ppcImlGenContext
|
|||
|
||||
// todo: If possible, merge with the segment following conditionalSegment (merging is only possible if the segment is not an entry point or has no other jump sources)
|
||||
}
|
||||
|
||||
// insert cycle counter instruction in every segment that has a cycle count greater zero
|
||||
//for (IMLSegment* segIt : ppcImlGenContext.segmentList2)
|
||||
//{
|
||||
// if( segIt->ppcAddrMin == 0 )
|
||||
// continue;
|
||||
// // count number of PPC instructions in segment
|
||||
// // note: This algorithm correctly counts inlined functions but it doesn't count NO-OP instructions like ISYNC since they generate no IML instructions
|
||||
// uint32 lastPPCInstAddr = 0;
|
||||
// uint32 ppcCount2 = 0;
|
||||
// for (sint32 i = 0; i < segIt->imlList.size(); i++)
|
||||
// {
|
||||
// if (segIt->imlList[i].associatedPPCAddress == 0)
|
||||
// continue;
|
||||
// if (segIt->imlList[i].associatedPPCAddress == lastPPCInstAddr)
|
||||
// continue;
|
||||
// lastPPCInstAddr = segIt->imlList[i].associatedPPCAddress;
|
||||
// ppcCount2++;
|
||||
// }
|
||||
// //uint32 ppcCount = imlSegment->ppcAddrMax-imlSegment->ppcAddrMin+4; -> No longer works with inlined functions
|
||||
// uint32 cycleCount = ppcCount2;// ppcCount / 4;
|
||||
// if( cycleCount > 0 )
|
||||
// {
|
||||
// PPCRecompiler_pushBackIMLInstructions(segIt, 0, 1);
|
||||
// segIt->imlList[0].type = PPCREC_IML_TYPE_MACRO;
|
||||
// segIt->imlList[0].crRegister = PPC_REC_INVALID_REGISTER;
|
||||
// segIt->imlList[0].operation = PPCREC_IML_MACRO_COUNT_CYCLES;
|
||||
// segIt->imlList[0].op_macro.param = cycleCount;
|
||||
// }
|
||||
//}
|
||||
return true;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue