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PPCRec: Rework carry bit and generalize carry IML instructions
Carry bit is now resident in a register-allocated GPR instead of being backed directly into IML instructions All the PowerPC carry ADD* and SUB* instructions as well as SRAW/SRAWI have been reworked to use more generalized IML instructions for handling carry IML instructions now support two named output registers instead of only one (easily extendable to arbitrary count)
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commit
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16 changed files with 3894 additions and 958 deletions
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@ -167,13 +167,11 @@ PPCRecFunction_t* PPCRecompiler_recompileFunction(PPCFunctionBoundaryTracker::PP
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return nullptr;
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}
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uint32 ppcRecLowerAddr = LaunchSettings::GetPPCRecLowerAddr();
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uint32 ppcRecUpperAddr = LaunchSettings::GetPPCRecUpperAddr();
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if (ppcRecLowerAddr != 0 && ppcRecUpperAddr != 0)
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{
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if (ppcRecFunc->ppcAddress < ppcRecLowerAddr || ppcRecFunc->ppcAddress > ppcRecUpperAddr)
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{
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delete ppcRecFunc;
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@ -188,11 +186,16 @@ PPCRecFunction_t* PPCRecompiler_recompileFunction(PPCFunctionBoundaryTracker::PP
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return nullptr;
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}
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//if (ppcRecFunc->ppcAddress == 0x12345678)
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//if (ppcRecFunc->ppcAddress == 0x11223344)
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//{
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// debug_printf("----------------------------------------\n");
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// IMLDebug_Dump(&ppcImlGenContext);
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// __debugbreak();
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// //debug_printf("----------------------------------------\n");
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// //IMLDebug_Dump(&ppcImlGenContext);
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// //__debugbreak();
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//}
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//else
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//{
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// delete ppcRecFunc;
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// return nullptr;
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//}
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// Large functions for testing (botw):
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