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PPCRec: Fix merge conflicts
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e1e710e3f5
commit
f2a07ade4c
4 changed files with 57 additions and 108 deletions
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@ -8,11 +8,6 @@
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#include "util/MemMapper/MemMapper.h"
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#include "Common/cpu_features.h"
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bool s_hasLZCNTSupport = false;
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bool s_hasMOVBESupport = false;
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bool s_hasBMI2Support = false;
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bool s_hasAVXSupport = false;
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sint32 x64Gen_registerMap[12] = // virtual GPR to x64 register mapping
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{
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REG_RAX, REG_RDX, REG_RBX, REG_RBP, REG_RSI, REG_RDI, REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_RCX
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@ -374,7 +369,7 @@ bool PPCRecompilerX64Gen_imlInstruction_load(PPCRecFunction_t* PPCRecFunction, p
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{
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x64Gen_lea_reg64Low32_reg64Low32PlusReg64Low32(x64GenContext, REG_RESV_TEMP, realRegisterMem, realRegisterMem2);
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}
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if( IMLBackendX64_HasExtensionMOVBE() && switchEndian )
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if( g_CPUFeatures.x86.movbe && switchEndian )
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{
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if (indexed)
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{
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@ -412,7 +407,7 @@ bool PPCRecompilerX64Gen_imlInstruction_load(PPCRecFunction_t* PPCRecFunction, p
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{
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x64Gen_add_reg64Low32_reg64Low32(x64GenContext, realRegisterMem, realRegisterMem2);
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}
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if(IMLBackendX64_HasExtensionMOVBE() && switchEndian )
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if(g_CPUFeatures.x86.movbe && switchEndian )
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{
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x64Gen_movBEZeroExtend_reg64Low16_mem16Reg64PlusReg64(x64GenContext, realRegisterData, REG_R13, realRegisterMem, imlInstruction->op_storeLoad.immS32);
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if( indexed && realRegisterMem != realRegisterData )
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@ -470,7 +465,7 @@ bool PPCRecompilerX64Gen_imlInstruction_load(PPCRecFunction_t* PPCRecFunction, p
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assert_dbg();
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if( indexed )
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x64Gen_add_reg64Low32_reg64Low32(x64GenContext, realRegisterMem, realRegisterMem2); // can be replaced with LEA temp, [memReg1+memReg2] (this way we can avoid the SUB instruction after the move)
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if(IMLBackendX64_HasExtensionMOVBE())
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if(g_CPUFeatures.x86.movbe)
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{
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x64Gen_movBEZeroExtend_reg64_mem32Reg64PlusReg64(x64GenContext, realRegisterData, REG_R13, realRegisterMem, imlInstruction->op_storeLoad.immS32);
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if( indexed && realRegisterMem != realRegisterData )
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@ -521,7 +516,7 @@ bool PPCRecompilerX64Gen_imlInstruction_store(PPCRecFunction_t* PPCRecFunction,
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if (indexed)
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PPCRecompilerX64Gen_crConditionFlags_forget(PPCRecFunction, ppcImlGenContext, x64GenContext);
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uint32 valueRegister;
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if ((swapEndian == false || IMLBackendX64_HasExtensionMOVBE()) && realRegisterMem != realRegisterData)
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if ((swapEndian == false || g_CPUFeatures.x86.movbe) && realRegisterMem != realRegisterData)
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{
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valueRegister = realRegisterData;
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}
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@ -530,11 +525,11 @@ bool PPCRecompilerX64Gen_imlInstruction_store(PPCRecFunction_t* PPCRecFunction,
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x64Gen_mov_reg64_reg64(x64GenContext, REG_RESV_TEMP, realRegisterData);
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valueRegister = REG_RESV_TEMP;
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}
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if (!IMLBackendX64_HasExtensionMOVBE() && swapEndian)
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if (!g_CPUFeatures.x86.movbe && swapEndian)
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x64Gen_bswap_reg64Lower32bit(x64GenContext, valueRegister);
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if (indexed)
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x64Gen_add_reg64Low32_reg64Low32(x64GenContext, realRegisterMem, realRegisterMem2);
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if (IMLBackendX64_HasExtensionMOVBE() && swapEndian)
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if (g_CPUFeatures.x86.movbe && swapEndian)
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x64Gen_movBETruncate_mem32Reg64PlusReg64_reg64(x64GenContext, REG_R13, realRegisterMem, imlInstruction->op_storeLoad.immS32, valueRegister);
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else
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x64Gen_movTruncate_mem32Reg64PlusReg64_reg64(x64GenContext, REG_R13, realRegisterMem, imlInstruction->op_storeLoad.immS32, valueRegister);
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@ -764,7 +759,7 @@ bool PPCRecompilerX64Gen_imlInstruction_r_r(PPCRecFunction_t* PPCRecFunction, pp
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PPCRecompilerX64Gen_crConditionFlags_forget(PPCRecFunction, ppcImlGenContext, x64GenContext);
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cemu_assert_debug(imlInstruction->crRegister == PPC_REC_INVALID_REGISTER);
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// LZCNT instruction (part of SSE4, CPUID.80000001H:ECX.ABM[Bit 5])
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if(IMLBackendX64_HasExtensionLZCNT())
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if(g_CPUFeatures.x86.lzcnt)
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{
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x64Gen_lzcnt_reg64Low32_reg64Low32(x64GenContext, tempToRealRegister(imlInstruction->op_r_r.registerResult), tempToRealRegister(imlInstruction->op_r_r.registerA));
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}
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@ -1482,12 +1477,12 @@ bool PPCRecompilerX64Gen_imlInstruction_r_r_r(PPCRecFunction_t* PPCRecFunction,
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sint32 rRegOperand1 = tempToRealRegister(imlInstruction->op_r_r_r.registerA);
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sint32 rRegOperand2 = tempToRealRegister(imlInstruction->op_r_r_r.registerB);
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if (IMLBackendX64_HasExtensionBMI2() && imlInstruction->operation == PPCREC_IML_OP_SRW)
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if (g_CPUFeatures.x86.bmi2 && imlInstruction->operation == PPCREC_IML_OP_SRW)
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{
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// use BMI2 SHRX if available
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x64Gen_shrx_reg64_reg64_reg64(x64GenContext, rRegResult, rRegOperand1, rRegOperand2);
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}
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else if (IMLBackendX64_HasExtensionBMI2() && imlInstruction->operation == PPCREC_IML_OP_SLW)
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else if (g_CPUFeatures.x86.bmi2 && imlInstruction->operation == PPCREC_IML_OP_SLW)
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{
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// use BMI2 SHLX if available
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x64Gen_shlx_reg64_reg64_reg64(x64GenContext, rRegResult, rRegOperand1, rRegOperand2);
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@ -2632,78 +2627,3 @@ void PPCRecompilerX64Gen_generateRecompilerInterfaceFunctions()
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PPCRecompiler_leaveRecompilerCode_visited = (void ATTR_MS_ABI (*)())PPCRecompilerX64Gen_generateLeaveRecompilerCode();
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cemu_assert_debug(PPCRecompiler_leaveRecompilerCode_unvisited != PPCRecompiler_leaveRecompilerCode_visited);
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}
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bool IMLBackendX64_HasExtensionLZCNT()
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{
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return s_hasLZCNTSupport;
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}
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bool IMLBackendX64_HasExtensionMOVBE()
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{
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return s_hasMOVBESupport;
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}
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bool IMLBackendX64_HasExtensionBMI2()
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{
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return s_hasBMI2Support;
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}
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bool IMLBackendX64_HasExtensionAVX()
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{
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return s_hasAVXSupport;
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}
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void IMLBackendX64_Init()
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{
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// init x64 recompiler instance data
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ppcRecompilerInstanceData->_x64XMM_xorNegateMaskBottom[0] = 1ULL << 63ULL;
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ppcRecompilerInstanceData->_x64XMM_xorNegateMaskBottom[1] = 0ULL;
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ppcRecompilerInstanceData->_x64XMM_xorNegateMaskPair[0] = 1ULL << 63ULL;
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ppcRecompilerInstanceData->_x64XMM_xorNegateMaskPair[1] = 1ULL << 63ULL;
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ppcRecompilerInstanceData->_x64XMM_xorNOTMask[0] = 0xFFFFFFFFFFFFFFFFULL;
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ppcRecompilerInstanceData->_x64XMM_xorNOTMask[1] = 0xFFFFFFFFFFFFFFFFULL;
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ppcRecompilerInstanceData->_x64XMM_andAbsMaskBottom[0] = ~(1ULL << 63ULL);
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ppcRecompilerInstanceData->_x64XMM_andAbsMaskBottom[1] = ~0ULL;
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ppcRecompilerInstanceData->_x64XMM_andAbsMaskPair[0] = ~(1ULL << 63ULL);
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ppcRecompilerInstanceData->_x64XMM_andAbsMaskPair[1] = ~(1ULL << 63ULL);
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ppcRecompilerInstanceData->_x64XMM_andFloatAbsMaskBottom[0] = ~(1 << 31);
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ppcRecompilerInstanceData->_x64XMM_andFloatAbsMaskBottom[1] = 0xFFFFFFFF;
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ppcRecompilerInstanceData->_x64XMM_andFloatAbsMaskBottom[2] = 0xFFFFFFFF;
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ppcRecompilerInstanceData->_x64XMM_andFloatAbsMaskBottom[3] = 0xFFFFFFFF;
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ppcRecompilerInstanceData->_x64XMM_singleWordMask[0] = 0xFFFFFFFFULL;
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ppcRecompilerInstanceData->_x64XMM_singleWordMask[1] = 0ULL;
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ppcRecompilerInstanceData->_x64XMM_constDouble1_1[0] = 1.0;
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ppcRecompilerInstanceData->_x64XMM_constDouble1_1[1] = 1.0;
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ppcRecompilerInstanceData->_x64XMM_constDouble0_0[0] = 0.0;
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ppcRecompilerInstanceData->_x64XMM_constDouble0_0[1] = 0.0;
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ppcRecompilerInstanceData->_x64XMM_constFloat0_0[0] = 0.0f;
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ppcRecompilerInstanceData->_x64XMM_constFloat0_0[1] = 0.0f;
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ppcRecompilerInstanceData->_x64XMM_constFloat1_1[0] = 1.0f;
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ppcRecompilerInstanceData->_x64XMM_constFloat1_1[1] = 1.0f;
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*(uint32*)&ppcRecompilerInstanceData->_x64XMM_constFloatMin[0] = 0x00800000;
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*(uint32*)&ppcRecompilerInstanceData->_x64XMM_constFloatMin[1] = 0x00800000;
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ppcRecompilerInstanceData->_x64XMM_flushDenormalMask1[0] = 0x7F800000;
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ppcRecompilerInstanceData->_x64XMM_flushDenormalMask1[1] = 0x7F800000;
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ppcRecompilerInstanceData->_x64XMM_flushDenormalMask1[2] = 0x7F800000;
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ppcRecompilerInstanceData->_x64XMM_flushDenormalMask1[3] = 0x7F800000;
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ppcRecompilerInstanceData->_x64XMM_flushDenormalMaskResetSignBits[0] = ~0x80000000;
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ppcRecompilerInstanceData->_x64XMM_flushDenormalMaskResetSignBits[1] = ~0x80000000;
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ppcRecompilerInstanceData->_x64XMM_flushDenormalMaskResetSignBits[2] = ~0x80000000;
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ppcRecompilerInstanceData->_x64XMM_flushDenormalMaskResetSignBits[3] = ~0x80000000;
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// mxcsr
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ppcRecompilerInstanceData->_x64XMM_mxCsr_ftzOn = 0x1F80 | 0x8000;
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ppcRecompilerInstanceData->_x64XMM_mxCsr_ftzOff = 0x1F80;
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// query processor extensions
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int cpuInfo[4];
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cpuid(cpuInfo, 0x80000001);
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s_hasLZCNTSupport = ((cpuInfo[2] >> 5) & 1) != 0;
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cpuid(cpuInfo, 0x1);
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s_hasMOVBESupport = ((cpuInfo[2] >> 22) & 1) != 0;
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s_hasAVXSupport = ((cpuInfo[2] >> 28) & 1) != 0;
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cpuidex(cpuInfo, 0x7, 0);
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s_hasBMI2Support = ((cpuInfo[1] >> 8) & 1) != 0;
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forceLog_printf("Recompiler initialized. CPU extensions: %s%s%s", s_hasLZCNTSupport ? "LZCNT " : "", s_hasMOVBESupport ? "MOVBE " : "", s_hasAVXSupport ? "AVX " : "");
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}
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