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672
src/util/Zir/Core/IR.h
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672
src/util/Zir/Core/IR.h
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#pragma once
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#include <optional>
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using f32 = float;
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using f64 = double;
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inline void zpir_debug_assert(bool _cond)
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{
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if(!_cond)
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assert_dbg();
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}
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namespace ZpIR
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{
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//enum class ZpIRCmdForm : uint8
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//{
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// FORM_VOID, // no-op
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// FORM_ZERO, // opcode without operands
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// FORM_1OP, // op0
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// FORM_2OP, // op0, op1
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// FORM_3OP, // op0, op1, op2
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// FORM_4OP, // op0, op1, op2, op3
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// // todo - memory read + memory store
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// FORM_MEM, // op0, opEA, offset, type
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// // todo - function calls
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//};
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//enum class ZpIROpcodeDepr : uint8
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//{
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// OP_VOID,
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// // FORM_1OP
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// OP_CALL,
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// // FORM_2OP
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// OP_ASSIGN, // copy/assignment
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// OP_CAST_ZEROEXT, // cast type to another. If broadening then zero-extend (unsigned cast)
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// OP_CAST_SIGNEXT, // cast type to another. If broadening then sign-extend (signed cast)
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// // FORM_3OP
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// OP_ADD, // op0 = op1 + op2
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// OP_SUB, // op0 = op1 - op2
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// OP_MUL, // op0 = op1 * op2
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// OP_DIV, // op0 = op1 / op2
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// // memory
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// OP_MEM_READ,
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// OP_MEM_WRITE,
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//};
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enum class DataType : uint8
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{
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NONE = 0x00,
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// integer
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U8 = 1,
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S8 = 2,
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U16 = 3,
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S16 = 4,
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U32 = 5,
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S32 = 6,
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U64 = 7,
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S64 = 8,
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// floating-point
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F32 = 0x10 + 0,
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F64 = 0x10 + 1,
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// special
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POINTER = 0x20, // dynamic width based on pointer width of target architecture
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// boolean
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BOOL = 0x30, // can hold false/true. Size depends on target architecture
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};
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typedef uint16 IRReg;
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typedef uint64 LocationSymbolName;
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typedef uint32 ZpIRPhysicalReg;
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inline bool isRegVar(IRReg r) { return r < 0x8000; };
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inline bool isConstVar(IRReg r) { return r >= 0x8000; };
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inline uint16 getRegIndex(IRReg r) { return (uint16)r & 0x7FFF; };
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namespace IR
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{
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enum class OpCode : uint8
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{
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UNDEF = 0, // undefined
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// basic opcodes
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MOV,
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// basic arithmetic opcodes
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ADD, // addition
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SUB, // subtraction
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MUL, // multiplication
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DIV, // division
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// conversion
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BITCAST, // like MOV, but allows registers of different types. No value conversion happens, raw bit copy
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SWAP_ENDIAN, // swap endianness
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CONVERT_INT_TO_FLOAT,
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CONVERT_FLOAT_TO_INT,
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// misc
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IMPORT_SINGLE, // import into a single IRReg. Depr: Make this like EXPORT where there is a 1-4 regs variant and one for more
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IMPORT, // import from external/custom resource into 1-4 IRReg
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EXPORT, // export 1-4 registers to external/custom resource
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// EXPORT_MANY // for when more than 4 registers are needed
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// vector
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EXTRACT_ELEMENT, // extract a scalar type from a vector type
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// some notes: We need this for texture read instructions. Where the result is a vec4 (f32x4) and this is how we can extract individual registers from that
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// update -> We may also instead just let the texture sample instruction specify 4 output registers
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};
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enum class OpForm : uint8
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{
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NONE = 0,
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RR = 1,
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RRR = 2,
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IMPORT_SINGLE = 3, // deprecated
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IMPORT = 4,
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EXPORT = 5,
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};
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// instruction base class
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class __InsBase
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{
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public:
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OpCode opcode;
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OpForm opform;
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__InsBase* next;
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protected:
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__InsBase(OpCode opcode, OpForm opform) : opcode(opcode), opform(opform) { };
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};
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// adapted base class, instruction forms inherit from this
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template<typename TInstr, OpForm TOpForm>
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class __InsBaseWithForm : public __InsBase
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{
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public:
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//OpCode opcode;
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//OpForm opform;
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//__InsBase* next;
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static const OpForm getForm()
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{
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return TOpForm;
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}
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static TInstr* getIfForm(__InsBase* instructionBase)
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{
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if (instructionBase->opform != TOpForm)
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return nullptr;
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return (TInstr*)instructionBase;
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}
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protected:
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__InsBaseWithForm(OpCode opcode) : __InsBase(opcode, TOpForm) { };
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};
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class InsRR : public __InsBaseWithForm<InsRR, OpForm::RR>
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{
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public:
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InsRR(OpCode opcode, IRReg rA, IRReg rB) : __InsBaseWithForm(opcode), rA(rA), rB(rB) {};
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IRReg rA;
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IRReg rB;
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};
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class InsRRR : public __InsBaseWithForm<InsRRR, OpForm::RRR>
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{
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public:
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InsRRR(OpCode opcode, IRReg rA, IRReg rB, IRReg rC) : __InsBaseWithForm(opcode), rA(rA), rB(rB), rC(rC) {};
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IRReg rA;
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IRReg rB;
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IRReg rC;
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};
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// should we support RRI format with 32bit signed integer as a way to avoid having to generate dozens of IR const regs for stuff like shift and other logical instructions with constant rhs?
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// and if we do, should it be a 32bit signed integer or should the type match the instruction type?
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class InsEXPORT : public __InsBaseWithForm<InsEXPORT, OpForm::EXPORT>
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{
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public:
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InsEXPORT(LocationSymbolName exportSymbol, IRReg r) : __InsBaseWithForm(OpCode::EXPORT), exportSymbol(exportSymbol)
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{
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regArray[0] = r;
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count = 1;
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};
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InsEXPORT(LocationSymbolName exportSymbol, IRReg r0, IRReg r1) : __InsBaseWithForm(OpCode::EXPORT), exportSymbol(exportSymbol)
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{
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regArray[0] = r0; regArray[1] = r1;
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count = 2;
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};
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InsEXPORT(LocationSymbolName exportSymbol, IRReg r0, IRReg r1, IRReg r2) : __InsBaseWithForm(OpCode::EXPORT), exportSymbol(exportSymbol)
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{
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regArray[0] = r0; regArray[1] = r1; regArray[2] = r2;
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count = 3;
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};
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InsEXPORT(LocationSymbolName exportSymbol, IRReg r0, IRReg r1, IRReg r2, IRReg r3) : __InsBaseWithForm(OpCode::EXPORT), exportSymbol(exportSymbol)
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{
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regArray[0] = r0;
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regArray[1] = r1;
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regArray[2] = r2;
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regArray[3] = r3;
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count = 4;
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};
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InsEXPORT(LocationSymbolName exportSymbol, std::span<IRReg> regs) : __InsBaseWithForm(OpCode::EXPORT), exportSymbol(exportSymbol)
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{
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zpir_debug_assert(regs.size() <= 4);
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for(size_t i=0; i<regs.size(); i++)
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regArray[i] = regs[i];
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count = (uint16)regs.size();
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};
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uint16 count;
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IRReg regArray[4]; // up to 4 registers
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LocationSymbolName exportSymbol;
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};
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class InsIMPORT : public __InsBaseWithForm<InsIMPORT, OpForm::IMPORT>
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{
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public:
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InsIMPORT(LocationSymbolName importSymbol, IRReg r) : __InsBaseWithForm(OpCode::IMPORT), importSymbol(importSymbol)
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{
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regArray[0] = r;
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count = 1;
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};
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InsIMPORT(LocationSymbolName importSymbol, IRReg r0, IRReg r1) : __InsBaseWithForm(OpCode::IMPORT), importSymbol(importSymbol)
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{
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regArray[0] = r0; regArray[1] = r1;
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count = 2;
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};
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InsIMPORT(LocationSymbolName importSymbol, IRReg r0, IRReg r1, IRReg r2) : __InsBaseWithForm(OpCode::IMPORT), importSymbol(importSymbol)
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{
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regArray[0] = r0; regArray[1] = r1; regArray[2] = r2;
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count = 3;
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};
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InsIMPORT(LocationSymbolName importSymbol, IRReg r0, IRReg r1, IRReg r2, IRReg r3) : __InsBaseWithForm(OpCode::IMPORT), importSymbol(importSymbol)
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{
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regArray[0] = r0;
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regArray[1] = r1;
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regArray[2] = r2;
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regArray[3] = r3;
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count = 4;
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};
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InsIMPORT(LocationSymbolName importSymbol, std::span<IRReg> regs) : __InsBaseWithForm(OpCode::IMPORT), importSymbol(importSymbol)
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{
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zpir_debug_assert(regs.size() <= 4);
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for (size_t i = 0; i < regs.size(); i++)
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regArray[i] = regs[i];
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count = (uint16)regs.size();
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};
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uint16 count;
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IRReg regArray[4]; // up to 4 registers
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LocationSymbolName importSymbol;
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};
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};
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// IR register definition stored in basic block
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struct IRRegDef
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{
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IRRegDef(DataType type, uint8 elementCount) : type(type), elementCount(elementCount) {};
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DataType type;
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uint8 elementCount; // 1 = scalar
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ZpIRPhysicalReg physicalRegister{ std::numeric_limits<ZpIRPhysicalReg>::max()};
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// todo - information about spilling location? (it depends on the architecture so we should keep this out of the core IR)
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bool hasAssignedPhysicalRegister() const
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{
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return physicalRegister != std::numeric_limits<ZpIRPhysicalReg>::max();
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}
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void assignPhysicalRegister(ZpIRPhysicalReg physReg)
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{
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physicalRegister = physReg;
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}
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};
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// IR register constant definition stored in basic block
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struct IRRegConstDef
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{
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IRRegConstDef() {};
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// todo - support for constants with more than one element?
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IRRegConstDef& setU32(uint32 v) { value_u32 = v; type = DataType::U32; return *this; };
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IRRegConstDef& setS32(sint32 v) { value_s32 = v; type = DataType::S32; return *this; };
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IRRegConstDef& setF32(f32 v) { value_f32 = v; type = DataType::F32; return *this; };
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IRRegConstDef& setPtr(void* v) { value_ptr = v; type = DataType::POINTER; return *this; };
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IRRegConstDef& setRaw(uint32 v, DataType regType) { value_u32 = v; type = regType; return *this; };
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DataType type{ DataType::NONE };
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union
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{
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uint32 value_u32;
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sint32 value_s32;
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sint64 value_s64;
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uint64 value_u64;
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void* value_ptr;
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f32 value_f32;
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f64 value_f64;
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};
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};
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struct ZpIRBasicBlock
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{
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friend class ZpIRBuilder;
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struct IRBBImport
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{
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IRBBImport(IRReg reg, LocationSymbolName name) : reg(reg), name(name) {};
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IRReg reg;
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LocationSymbolName name;
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};
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struct IRBBExport
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{
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IRBBExport(IRReg reg, LocationSymbolName name) : reg(reg), name(name) {};
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IRReg reg;
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LocationSymbolName name;
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};
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IR::__InsBase* m_instructionFirst{};
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IR::__InsBase* m_instructionLast{};
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std::vector<IRRegDef> m_regs;
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std::vector<IRRegConstDef> m_consts;
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std::vector<IRBBImport> m_imports;
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std::vector<IRBBExport> m_exports;
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ZpIRBasicBlock* m_branchNotTaken{ nullptr }; // next block if branch not taken or no branch present
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ZpIRBasicBlock* m_branchTaken{ nullptr }; // next block if branch is taken
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void* m_workbuffer{}; // can be used as temporary storage for information
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void appendInstruction(IR::__InsBase* ins)
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{
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if (m_instructionFirst == nullptr)
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{
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m_instructionFirst = ins;
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m_instructionLast = ins;
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ins->next = nullptr;
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return;
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}
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m_instructionLast->next = ins;
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m_instructionLast = ins;
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ins->next = nullptr;
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}
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IRReg createRegister(DataType type, uint8 elementCount = 1)
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{
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uint32 index = (uint32)m_regs.size();
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cemu_assert_debug(index < 0x8000);
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m_regs.emplace_back(type, elementCount);
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return (IRReg)index;
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}
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IRReg createConstantU32(uint32 value)
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{
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uint32 index = (uint32)m_consts.size();
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cemu_assert_debug(index < 0x8000);
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m_consts.emplace_back().setU32(value);
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return (IRReg)((uint16)index + 0x8000);
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}
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IRReg createTypedConstant(uint32 value, DataType type)
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{
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uint32 index = (uint32)m_consts.size();
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cemu_assert_debug(index < 0x8000);
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m_consts.emplace_back().setRaw(value, type);
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return (IRReg)((uint16)index + 0x8000);
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}
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IRReg createConstantS32(uint32 value)
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{
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uint32 index = (uint32)m_consts.size();
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cemu_assert_debug(index < 0x8000);
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m_consts.emplace_back().setS32(value);
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return (IRReg)((uint16)index + 0x8000);
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}
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IRReg createConstantF32(f32 value)
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{
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uint32 index = (uint32)m_consts.size();
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cemu_assert_debug(index < 0x8000);
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m_consts.emplace_back().setF32(value);
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return (IRReg)((uint16)index + 0x8000);
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}
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IRReg createConstantPointer(void* value)
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{
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uint32 index = (uint32)m_consts.size();
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cemu_assert_debug(index < 0x8000);
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m_consts.emplace_back().setPtr(value);
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return (IRReg)((uint16)index + 0x8000);
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}
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void addImport(IRReg reg, LocationSymbolName importName)
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{
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m_imports.emplace_back(reg, importName);
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}
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void addExport(IRReg reg, LocationSymbolName importName)
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{
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m_exports.emplace_back(reg, importName);
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}
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void setWorkbuffer(void* buffer)
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{
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if (buffer != nullptr)
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{
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if (m_workbuffer)
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assert_dbg();
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}
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m_workbuffer = buffer;
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}
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void* getWorkbuffer()
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{
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return m_workbuffer;
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}
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DataType getRegType(IRReg reg)
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{
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uint32 index = (uint32)reg;
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if (index >= 0x8000)
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{
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index -= 0x8000;
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cemu_assert_debug(index < m_consts.size());
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return m_consts[index].type;
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}
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return m_regs[index].type;
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}
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IRRegConstDef* getConstant(IRReg reg)
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{
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uint32 index = (uint32)reg;
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if (index < 0x8000)
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return nullptr;
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index -= 0x8000;
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if (index >= m_consts.size())
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return nullptr;
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return m_consts.data() + index;
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}
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std::optional<sint32> getConstantS32(IRReg reg)
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||||
{
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uint32 index = (uint32)reg;
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if (index < 0x8000)
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return std::nullopt;
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index -= 0x8000;
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if (index >= m_consts.size())
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return std::nullopt;
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if (m_consts[index].type == DataType::U32)
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return (sint32)m_consts[index].value_u32;
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else if (m_consts[index].type == DataType::POINTER)
|
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assert_dbg();
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else if (m_consts[index].type == DataType::U64)
|
||||
{
|
||||
if (m_consts[index].value_u64 >= 0x80000000ull)
|
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assert_dbg();
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||||
return (sint32)m_consts[index].value_u64;
|
||||
}
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||||
else
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||||
assert_dbg();
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||||
return std::nullopt;
|
||||
}
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||||
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||||
std::optional<uint64> getConstantU64(IRReg reg)
|
||||
{
|
||||
auto constReg = getConstant(reg);
|
||||
if (!constReg)
|
||||
return std::nullopt;
|
||||
if (constReg->type == DataType::U64)
|
||||
return constReg->value_u64;
|
||||
else
|
||||
assert_dbg();
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||||
return std::nullopt;
|
||||
}
|
||||
};
|
||||
|
||||
struct ZpIRFunction
|
||||
{
|
||||
std::vector<ZpIRBasicBlock*> m_basicBlocks;
|
||||
std::vector<ZpIRBasicBlock*> m_entryBlocks;
|
||||
std::vector<ZpIRBasicBlock*> m_exitBlocks;
|
||||
|
||||
struct
|
||||
{
|
||||
bool registersAllocated{false};
|
||||
}state;
|
||||
};
|
||||
|
||||
// helpers for shader code
|
||||
namespace ShaderSubset
|
||||
{
|
||||
class ShaderImportLocation
|
||||
{
|
||||
enum LOC_TYPE : uint8
|
||||
{
|
||||
LOC_TYPE_UNIFORM_REGISTER = 1,
|
||||
LOC_TYPE_UNIFORM_BUFFER = 2,
|
||||
LOC_TYPE_ATTRIBUTE = 3,
|
||||
};
|
||||
public:
|
||||
ShaderImportLocation() {}
|
||||
ShaderImportLocation(LocationSymbolName loc)
|
||||
{
|
||||
uint64 v = (uint64)loc;
|
||||
|
||||
m_locType = (LOC_TYPE)(v >> 56);
|
||||
m_indexA = (uint16)(v >> 0);
|
||||
m_indexB = (uint16)(v >> 16);
|
||||
}
|
||||
|
||||
ShaderImportLocation& SetUniformRegister(uint16 index)
|
||||
{
|
||||
m_locType = LOC_TYPE_UNIFORM_REGISTER;
|
||||
m_indexA = index;
|
||||
m_indexB = 0;
|
||||
return *this;
|
||||
}
|
||||
|
||||
ShaderImportLocation& SetVertexAttribute(uint16 attributeIndex, uint16 channelIndex)
|
||||
{
|
||||
m_locType = LOC_TYPE_ATTRIBUTE;
|
||||
m_indexA = attributeIndex;
|
||||
m_indexB = channelIndex;
|
||||
return *this;
|
||||
}
|
||||
|
||||
bool IsUniformRegister() const
|
||||
{
|
||||
return m_locType == LOC_TYPE_UNIFORM_REGISTER;
|
||||
}
|
||||
|
||||
bool IsVertexAttribute() const
|
||||
{
|
||||
return m_locType == LOC_TYPE_ATTRIBUTE;
|
||||
}
|
||||
|
||||
void GetUniformRegister(uint16& index)
|
||||
{
|
||||
index = m_indexA;
|
||||
}
|
||||
|
||||
void GetVertexAttribute(uint16& attributeIndex, uint16& channelIndex) const
|
||||
{
|
||||
attributeIndex = m_indexA;
|
||||
channelIndex = m_indexB;
|
||||
}
|
||||
|
||||
operator LocationSymbolName() const
|
||||
{
|
||||
uint64 v = 0;
|
||||
v |= ((uint64)m_locType << 56);
|
||||
v |= ((uint64)m_indexA << 0);
|
||||
v |= ((uint64)m_indexB << 16);
|
||||
|
||||
return (LocationSymbolName)v;
|
||||
}
|
||||
|
||||
std::string GetDebugName()
|
||||
{
|
||||
const char elementTable[] = { 'x' , 'y', 'z', 'w' };
|
||||
|
||||
if (m_locType == LOC_TYPE_UNIFORM_REGISTER)
|
||||
return fmt::format("UniformReg[{0}].{1}", m_indexA >> 2, elementTable[m_indexA & 3]);
|
||||
if (m_locType == LOC_TYPE_ATTRIBUTE)
|
||||
return fmt::format("VertexAttribute[{0}].{1}", m_indexA, elementTable[m_indexB]);
|
||||
|
||||
return "Unknown";
|
||||
}
|
||||
|
||||
private:
|
||||
LOC_TYPE m_locType{};
|
||||
uint16 m_indexA{};
|
||||
uint16 m_indexB{};
|
||||
//LocationSymbolName m_symbolName{};
|
||||
static_assert(sizeof(LocationSymbolName) == 8);
|
||||
};
|
||||
|
||||
class ShaderExportLocation
|
||||
{
|
||||
enum LOC_TYPE : uint8
|
||||
{
|
||||
LOC_TYPE_POSITION = 1,
|
||||
LOC_TYPE_OUTPUT = 2,
|
||||
};
|
||||
public:
|
||||
ShaderExportLocation() {}
|
||||
ShaderExportLocation(LocationSymbolName loc)
|
||||
{
|
||||
uint64 v = (uint64)loc;
|
||||
|
||||
m_locType = (LOC_TYPE)(v >> 56);
|
||||
m_indexA = (uint16)(v >> 0);
|
||||
m_indexB = (uint16)(v >> 16);
|
||||
}
|
||||
|
||||
ShaderExportLocation& SetPosition()
|
||||
{
|
||||
m_locType = LOC_TYPE_POSITION;
|
||||
m_indexA = 0;
|
||||
m_indexB = 0;
|
||||
return *this;
|
||||
}
|
||||
|
||||
ShaderExportLocation& SetOutputAttribute(uint16 attributeIndex) // todo - channel mask?
|
||||
{
|
||||
m_locType = LOC_TYPE_OUTPUT;
|
||||
m_indexA = attributeIndex;
|
||||
m_indexB = 0;
|
||||
return *this;
|
||||
}
|
||||
|
||||
bool IsPosition() const
|
||||
{
|
||||
return m_locType == LOC_TYPE_POSITION;
|
||||
}
|
||||
|
||||
bool IsOutputAttribute() const
|
||||
{
|
||||
return m_locType == LOC_TYPE_OUTPUT;
|
||||
}
|
||||
|
||||
void GetOutputAttribute(uint16& attributeIndex) const
|
||||
{
|
||||
attributeIndex = m_indexA;
|
||||
}
|
||||
|
||||
operator LocationSymbolName() const
|
||||
{
|
||||
uint64 v = 0;
|
||||
v |= ((uint64)m_locType << 56);
|
||||
v |= ((uint64)m_indexA << 0);
|
||||
v |= ((uint64)m_indexB << 16);
|
||||
|
||||
return (LocationSymbolName)v;
|
||||
}
|
||||
|
||||
std::string GetDebugName()
|
||||
{
|
||||
const char elementTable[] = { 'x' , 'y', 'z', 'w' };
|
||||
|
||||
//if (m_locType == LOC_TYPE_UNIFORM_REGISTER)
|
||||
// return fmt::format("UniformReg[{0}].{1}", m_indexA >> 2, elementTable[m_indexA & 3]);
|
||||
//if (m_locType == LOC_TYPE_ATTRIBUTE)
|
||||
// return fmt::format("VertexAttribute[{0}].{1}", m_indexA, elementTable[m_indexB]);
|
||||
|
||||
return "Unknown";
|
||||
}
|
||||
|
||||
private:
|
||||
LOC_TYPE m_locType{};
|
||||
uint16 m_indexA{};
|
||||
uint16 m_indexB{};
|
||||
static_assert(sizeof(LocationSymbolName) == 8);
|
||||
};
|
||||
|
||||
};
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue