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Logging migration (forceLogDebug_printf) (#780)
* script changes - no arguments * script changes with 2 arguments * script changes with > 2 arguments * script conversions with 1 argument - pt. 1 * script conversions with 1 argument - pt. 2 * script conversions with 1 argument - pt. 3 * script conversions with 1 argument - pt. 4 * script conversions with 1 argument - pt. 5 Pointer format hunting * Fixed pointer format * script conversions with 1 argument - final * fixed conversion in non utf-8 file * fixed conversion with capital letter * actually fixed conversion with capital letter * fixed another capital lettering issue * Added conversions with LR removed * removed LR from logs * Converted logs that previously contained LR * converted log that originally specified string length * fixed log with commas in main text * fixed multi-line log * Fixed more logs with commas in main text * Fixed unformatted pointer * added conversion with float value * converted lines with double parameters * converted missed line * corrected argument formatting Co-authored-by: Crementif <26669564+Crementif@users.noreply.github.com> * Fixed misspellings of "unhandled" unhandeled -> unhandled Co-authored-by: Crementif <26669564+Crementif@users.noreply.github.com> --------- Co-authored-by: Crementif <26669564+Crementif@users.noreply.github.com>
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98 changed files with 469 additions and 469 deletions
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@ -12,7 +12,7 @@
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void PPCInterpreter_MFMSR(PPCInterpreter_t* hCPU, uint32 Opcode)
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{
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forceLogDebug_printf("Rare instruction: MFMSR");
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cemuLog_logDebug(LogType::Force, "Rare instruction: MFMSR");
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if (hCPU->sprExtended.msr & MSR_PR)
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{
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PPC_ASSERT(true);
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@ -28,7 +28,7 @@ void PPCInterpreter_MFMSR(PPCInterpreter_t* hCPU, uint32 Opcode)
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void PPCInterpreter_MTMSR(PPCInterpreter_t* hCPU, uint32 Opcode)
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{
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forceLogDebug_printf("Rare instruction: MTMSR");
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cemuLog_logDebug(LogType::Force, "Rare instruction: MTMSR");
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if (hCPU->sprExtended.msr & MSR_PR)
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{
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PPC_ASSERT(true);
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@ -43,7 +43,7 @@ void PPCInterpreter_MTMSR(PPCInterpreter_t* hCPU, uint32 Opcode)
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void PPCInterpreter_MTFSB1X(PPCInterpreter_t* hCPU, uint32 Opcode)
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{
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forceLogDebug_printf("Rare instruction: MTFSB1X");
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cemuLog_logDebug(LogType::Force, "Rare instruction: MTFSB1X");
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int crbD, n1, n2;
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PPC_OPC_TEMPL_X(Opcode, crbD, n1, n2);
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if (crbD != 1 && crbD != 2)
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@ -212,7 +212,7 @@ void PPCInterpreter_BCLRX(PPCInterpreter_t* hCPU, uint32 Opcode)
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if (hCPU->spr.CTR == 0)
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{
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PPC_ASSERT(true);
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forceLogDebug_printf("Decrementer underflow!\n");
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cemuLog_logDebug(LogType::Force, "Decrementer underflow!");
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}
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hCPU->spr.CTR--;
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}
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@ -331,7 +331,7 @@ void PPCInterpreter_EIEIO(PPCInterpreter_t* hCPU, uint32 Opcode)
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void PPCInterpreter_SC(PPCInterpreter_t* hCPU, uint32 Opcode)
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{
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forceLogDebug_printf("SC executed at 0x%08x", hCPU->instructionPointer);
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cemuLog_logDebug(LogType::Force, "SC executed at 0x{:08x}", hCPU->instructionPointer);
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// next instruction
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PPCInterpreter_nextInstruction(hCPU);
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}
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@ -352,7 +352,7 @@ void PPCInterpreter_ISYNC(PPCInterpreter_t* hCPU, uint32 Opcode)
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void PPCInterpreter_RFI(PPCInterpreter_t* hCPU, uint32 Opcode)
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{
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forceLogDebug_printf("RFI");
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cemuLog_logDebug(LogType::Force, "RFI");
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hCPU->sprExtended.msr &= ~(0x87C0FF73 | 0x00040000);
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hCPU->sprExtended.msr |= hCPU->sprExtended.srr1 & 0x87c0ff73;
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hCPU->sprExtended.msr |= MSR_RI;
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