Logging migration (forceLogDebug_printf) (#780)

* script changes - no arguments

* script changes with 2 arguments

* script changes with > 2 arguments

* script conversions with 1 argument - pt. 1

* script conversions with 1 argument - pt. 2

* script conversions with 1 argument - pt. 3

* script conversions with 1 argument - pt. 4

* script conversions with 1 argument - pt. 5

Pointer format hunting

* Fixed pointer format

* script conversions with 1 argument - final

* fixed conversion in non utf-8 file

* fixed conversion with capital letter

* actually fixed conversion with capital letter

* fixed another capital lettering issue

* Added conversions with LR removed

* removed LR from logs

* Converted logs that previously contained LR

* converted log that originally specified string length

* fixed log with commas in main text

* fixed multi-line log

* Fixed more logs with commas in main text

* Fixed unformatted pointer

* added conversion with float value

* converted lines with double parameters

* converted missed line

* corrected argument formatting

Co-authored-by: Crementif <26669564+Crementif@users.noreply.github.com>

* Fixed misspellings of "unhandled"

unhandeled -> unhandled

Co-authored-by: Crementif <26669564+Crementif@users.noreply.github.com>

---------

Co-authored-by: Crementif <26669564+Crementif@users.noreply.github.com>
This commit is contained in:
why-keith 2023-04-25 07:43:31 +01:00 committed by GitHub
parent f48ad6a1ca
commit caa57a3cfd
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
98 changed files with 469 additions and 469 deletions

View file

@ -12,7 +12,7 @@
void PPCInterpreter_MFMSR(PPCInterpreter_t* hCPU, uint32 Opcode)
{
forceLogDebug_printf("Rare instruction: MFMSR");
cemuLog_logDebug(LogType::Force, "Rare instruction: MFMSR");
if (hCPU->sprExtended.msr & MSR_PR)
{
PPC_ASSERT(true);
@ -28,7 +28,7 @@ void PPCInterpreter_MFMSR(PPCInterpreter_t* hCPU, uint32 Opcode)
void PPCInterpreter_MTMSR(PPCInterpreter_t* hCPU, uint32 Opcode)
{
forceLogDebug_printf("Rare instruction: MTMSR");
cemuLog_logDebug(LogType::Force, "Rare instruction: MTMSR");
if (hCPU->sprExtended.msr & MSR_PR)
{
PPC_ASSERT(true);
@ -43,7 +43,7 @@ void PPCInterpreter_MTMSR(PPCInterpreter_t* hCPU, uint32 Opcode)
void PPCInterpreter_MTFSB1X(PPCInterpreter_t* hCPU, uint32 Opcode)
{
forceLogDebug_printf("Rare instruction: MTFSB1X");
cemuLog_logDebug(LogType::Force, "Rare instruction: MTFSB1X");
int crbD, n1, n2;
PPC_OPC_TEMPL_X(Opcode, crbD, n1, n2);
if (crbD != 1 && crbD != 2)
@ -212,7 +212,7 @@ void PPCInterpreter_BCLRX(PPCInterpreter_t* hCPU, uint32 Opcode)
if (hCPU->spr.CTR == 0)
{
PPC_ASSERT(true);
forceLogDebug_printf("Decrementer underflow!\n");
cemuLog_logDebug(LogType::Force, "Decrementer underflow!");
}
hCPU->spr.CTR--;
}
@ -331,7 +331,7 @@ void PPCInterpreter_EIEIO(PPCInterpreter_t* hCPU, uint32 Opcode)
void PPCInterpreter_SC(PPCInterpreter_t* hCPU, uint32 Opcode)
{
forceLogDebug_printf("SC executed at 0x%08x", hCPU->instructionPointer);
cemuLog_logDebug(LogType::Force, "SC executed at 0x{:08x}", hCPU->instructionPointer);
// next instruction
PPCInterpreter_nextInstruction(hCPU);
}
@ -352,7 +352,7 @@ void PPCInterpreter_ISYNC(PPCInterpreter_t* hCPU, uint32 Opcode)
void PPCInterpreter_RFI(PPCInterpreter_t* hCPU, uint32 Opcode)
{
forceLogDebug_printf("RFI");
cemuLog_logDebug(LogType::Force, "RFI");
hCPU->sprExtended.msr &= ~(0x87C0FF73 | 0x00040000);
hCPU->sprExtended.msr |= hCPU->sprExtended.srr1 & 0x87c0ff73;
hCPU->sprExtended.msr |= MSR_RI;