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PPCRec: Add RA support for instructions with register constraints

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Also make interval tracking more fine grained and differentiate between input and output edges of each instruction
This commit is contained in:
Exzap 2024-10-17 12:06:12 +02:00
parent 675c802cc1
commit aa946ae42d
10 changed files with 2308 additions and 736 deletions
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20
src/Cafe/HW/Espresso/Recompiler/IML/IMLRegisterAllocator.h
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@ -1,6 +1,7 @@
#pragma once
// container for storing a set of register indices
// specifically optimized towards storing physical register indices (expected to be below 64)
// specifically optimized towards storing typical range of physical register indices (expected to be below 64)
class IMLPhysRegisterSet
{
public:
@ -33,11 +34,21 @@ public:
return *this;
}
void RemoveRegisters(const IMLPhysRegisterSet& other)
{
this->m_regBitmask &= ~other.m_regBitmask;
}
bool HasAnyAvailable() const
{
return m_regBitmask != 0;
}
bool HasExactlyOneAvailable() const
{
return m_regBitmask != 0 && (m_regBitmask & (m_regBitmask - 1)) == 0;
}
// returns index of first available register. Do not call when HasAnyAvailable() == false
uint32 GetFirstAvailableReg()
{
@ -59,7 +70,7 @@ public:
// returns index of next available register (search includes any register index >= startIndex)
// returns -1 if there is no more register
sint32 GetNextAvailableReg(sint32 startIndex)
sint32 GetNextAvailableReg(sint32 startIndex) const
{
if (startIndex >= 64)
return -1;
@ -81,6 +92,11 @@ public:
return regIndex;
}
sint32 CountAvailableRegs() const
{
return std::popcount(m_regBitmask);
}
private:
uint64 m_regBitmask{ 0 };
};