PPCRec: Smaller cleanups

This commit is contained in:
Exzap 2025-05-06 04:53:07 +02:00
parent 3031a98b16
commit 4f4caaaa73
7 changed files with 41 additions and 55 deletions

View file

@ -1204,16 +1204,11 @@ void PPCRecompilerX64Gen_imlInstruction_r_name(PPCRecFunction_t* PPCRecFunction,
else if (imlInstruction->op_r_name.regR.GetBaseFormat() == IMLRegFormat::F64) else if (imlInstruction->op_r_name.regR.GetBaseFormat() == IMLRegFormat::F64)
{ {
auto regR = _regF64(imlInstruction->op_r_name.regR); auto regR = _regF64(imlInstruction->op_r_name.regR);
if (name >= PPCREC_NAME_FPR0 && name < (PPCREC_NAME_FPR0 + 32)) if (name >= PPCREC_NAME_FPR_HALF && name < (PPCREC_NAME_FPR_HALF + 64))
{ {
x64Gen_movupd_xmmReg_memReg128(x64GenContext, regR, REG_RESV_HCPU, offsetof(PPCInterpreter_t, fpr) + sizeof(FPR_t) * (name - PPCREC_NAME_FPR0)); sint32 regIndex = (name - PPCREC_NAME_FPR_HALF) / 2;
} sint32 pairIndex = (name - PPCREC_NAME_FPR_HALF) % 2;
else if (name >= PPCREC_NAME_FPR0_NEW && name < (PPCREC_NAME_FPR0_NEW + 64)) x64Gen_movsd_xmmReg_memReg64(x64GenContext, regR, REG_RESV_HCPU, offsetof(PPCInterpreter_t, fpr) + sizeof(FPR_t) * regIndex + pairIndex * sizeof(double));
{
sint32 regIndex = (name - PPCREC_NAME_FPR0_NEW) / 2;
sint32 pairIndex = (name - PPCREC_NAME_FPR0_NEW) % 2;
x64Gen_movddup_xmmReg_memReg64(x64GenContext, regR, REG_RESV_HCPU, offsetof(PPCInterpreter_t, fpr) + sizeof(FPR_t) * regIndex + pairIndex * sizeof(double));
// todo - use movsd here
} }
else if (name >= PPCREC_NAME_TEMPORARY_FPR0 || name < (PPCREC_NAME_TEMPORARY_FPR0 + 8)) else if (name >= PPCREC_NAME_TEMPORARY_FPR0 || name < (PPCREC_NAME_TEMPORARY_FPR0 + 8))
{ {
@ -1288,14 +1283,10 @@ void PPCRecompilerX64Gen_imlInstruction_name_r(PPCRecFunction_t* PPCRecFunction,
{ {
auto regR = _regF64(imlInstruction->op_r_name.regR); auto regR = _regF64(imlInstruction->op_r_name.regR);
uint32 name = imlInstruction->op_r_name.name; uint32 name = imlInstruction->op_r_name.name;
if (name >= PPCREC_NAME_FPR0 && name < (PPCREC_NAME_FPR0 + 32)) if (name >= PPCREC_NAME_FPR_HALF && name < (PPCREC_NAME_FPR_HALF + 64))
{ {
x64Gen_movupd_memReg128_xmmReg(x64GenContext, regR, REG_RESV_HCPU, offsetof(PPCInterpreter_t, fpr) + sizeof(FPR_t) * (name - PPCREC_NAME_FPR0)); sint32 regIndex = (name - PPCREC_NAME_FPR_HALF) / 2;
} sint32 pairIndex = (name - PPCREC_NAME_FPR_HALF) % 2;
else if (name >= PPCREC_NAME_FPR0_NEW && name < (PPCREC_NAME_FPR0_NEW + 64))
{
sint32 regIndex = (name - PPCREC_NAME_FPR0_NEW) / 2;
sint32 pairIndex = (name - PPCREC_NAME_FPR0_NEW) % 2;
x64Gen_movsd_memReg64_xmmReg(x64GenContext, regR, REG_RESV_HCPU, offsetof(PPCInterpreter_t, fpr) + sizeof(FPR_t) * regIndex + (pairIndex ? sizeof(double) : 0)); x64Gen_movsd_memReg64_xmmReg(x64GenContext, regR, REG_RESV_HCPU, offsetof(PPCInterpreter_t, fpr) + sizeof(FPR_t) * regIndex + (pairIndex ? sizeof(double) : 0));
} }
else if (name >= PPCREC_NAME_TEMPORARY_FPR0 && name < (PPCREC_NAME_TEMPORARY_FPR0 + 8)) else if (name >= PPCREC_NAME_TEMPORARY_FPR0 && name < (PPCREC_NAME_TEMPORARY_FPR0 + 8))

View file

@ -42,7 +42,7 @@ bool PPCRecompilerX64Gen_imlInstruction_fpr_load(PPCRecFunction_t* PPCRecFunctio
realRegisterMem2 = _regI32(imlInstruction->op_storeLoad.registerMem2); realRegisterMem2 = _regI32(imlInstruction->op_storeLoad.registerMem2);
uint8 mode = imlInstruction->op_storeLoad.mode; uint8 mode = imlInstruction->op_storeLoad.mode;
if( mode == PPCREC_FPR_LD_MODE_SINGLE_INTO_PS0 ) if( mode == PPCREC_FPR_LD_MODE_SINGLE )
{ {
// load byte swapped single into temporary FPR // load byte swapped single into temporary FPR
if( indexed ) if( indexed )
@ -74,7 +74,7 @@ bool PPCRecompilerX64Gen_imlInstruction_fpr_load(PPCRecFunction_t* PPCRecFunctio
x64Gen_cvtss2sd_xmmReg_xmmReg(x64GenContext, realRegisterXMM, realRegisterXMM); x64Gen_cvtss2sd_xmmReg_xmmReg(x64GenContext, realRegisterXMM, realRegisterXMM);
} }
} }
else if( mode == PPCREC_FPR_LD_MODE_DOUBLE_INTO_PS0 ) else if( mode == PPCREC_FPR_LD_MODE_DOUBLE )
{ {
if( g_CPUFeatures.x86.avx ) if( g_CPUFeatures.x86.avx )
{ {
@ -149,7 +149,7 @@ bool PPCRecompilerX64Gen_imlInstruction_fpr_store(PPCRecFunction_t* PPCRecFuncti
if( indexed ) if( indexed )
realRegisterMem2 = _regI32(imlInstruction->op_storeLoad.registerMem2); realRegisterMem2 = _regI32(imlInstruction->op_storeLoad.registerMem2);
uint8 mode = imlInstruction->op_storeLoad.mode; uint8 mode = imlInstruction->op_storeLoad.mode;
if( mode == PPCREC_FPR_ST_MODE_SINGLE_FROM_PS0 ) if( mode == PPCREC_FPR_ST_MODE_SINGLE )
{ {
if (imlInstruction->op_storeLoad.flags2.notExpanded) if (imlInstruction->op_storeLoad.flags2.notExpanded)
{ {
@ -178,7 +178,7 @@ bool PPCRecompilerX64Gen_imlInstruction_fpr_store(PPCRecFunction_t* PPCRecFuncti
x64Gen_sub_reg64Low32_reg64Low32(x64GenContext, realRegisterMem, realRegisterMem2); x64Gen_sub_reg64Low32_reg64Low32(x64GenContext, realRegisterMem, realRegisterMem2);
} }
} }
else if( mode == PPCREC_FPR_ST_MODE_DOUBLE_FROM_PS0 ) else if( mode == PPCREC_FPR_ST_MODE_DOUBLE )
{ {
if( indexed ) if( indexed )
{ {

View file

@ -189,14 +189,10 @@ void IMLDebug_DisassembleInstruction(const IMLInstruction& inst, std::string& di
{ {
strOutput.addFmt("r{}", inst.op_r_name.name - PPCREC_NAME_R0); strOutput.addFmt("r{}", inst.op_r_name.name - PPCREC_NAME_R0);
} }
else if (inst.op_r_name.name >= PPCREC_NAME_FPR0 && inst.op_r_name.name < (PPCREC_NAME_FPR0 + 32)) if (inst.op_r_name.name >= PPCREC_NAME_FPR_HALF && inst.op_r_name.name < (PPCREC_NAME_FPR_HALF + 32*2))
{ {
strOutput.addFmt("f{}", inst.op_r_name.name - PPCREC_NAME_FPR0); strOutput.addFmt("f{}", inst.op_r_name.name - ((PPCREC_NAME_FPR_HALF - inst.op_r_name.name)/2));
} if ((inst.op_r_name.name-PPCREC_NAME_FPR_HALF)&1)
else if (inst.op_r_name.name >= PPCREC_NAME_FPR0_NEW && inst.op_r_name.name < (PPCREC_NAME_FPR0_NEW + 32*2))
{
strOutput.addFmt("f{}", inst.op_r_name.name - ((PPCREC_NAME_FPR0_NEW - inst.op_r_name.name)/2));
if ((inst.op_r_name.name-PPCREC_NAME_FPR0_NEW)&1)
strOutput.add(".ps1"); strOutput.add(".ps1");
else else
strOutput.add(".ps0"); strOutput.add(".ps0");

View file

@ -229,11 +229,11 @@ void IMLInstruction::CheckRegisterUsage(IMLUsedRegisters* registersUsed) const
// determine partially written result // determine partially written result
switch (op_storeLoad.mode) switch (op_storeLoad.mode)
{ {
case PPCREC_FPR_LD_MODE_DOUBLE_INTO_PS0: case PPCREC_FPR_LD_MODE_DOUBLE:
// PS1 remains the same // PS1 remains the same
registersUsed->readGPR2 = op_storeLoad.registerData; registersUsed->readGPR2 = op_storeLoad.registerData;
break; break;
case PPCREC_FPR_LD_MODE_SINGLE_INTO_PS0: case PPCREC_FPR_LD_MODE_SINGLE:
break; break;
default: default:
cemu_assert_unimplemented(); cemu_assert_unimplemented();
@ -251,11 +251,11 @@ void IMLInstruction::CheckRegisterUsage(IMLUsedRegisters* registersUsed) const
// determine partially written result // determine partially written result
switch (op_storeLoad.mode) switch (op_storeLoad.mode)
{ {
case PPCREC_FPR_LD_MODE_DOUBLE_INTO_PS0: case PPCREC_FPR_LD_MODE_DOUBLE:
// PS1 remains the same // PS1 remains the same
registersUsed->readGPR3 = op_storeLoad.registerData; registersUsed->readGPR3 = op_storeLoad.registerData;
break; break;
case PPCREC_FPR_LD_MODE_SINGLE_INTO_PS0: case PPCREC_FPR_LD_MODE_SINGLE:
break; break;
default: default:
cemu_assert_unimplemented(); cemu_assert_unimplemented();

View file

@ -251,8 +251,7 @@ enum // IMLName
PPCREC_NAME_TEMPORARY = 1000, PPCREC_NAME_TEMPORARY = 1000,
PPCREC_NAME_R0 = 2000, PPCREC_NAME_R0 = 2000,
PPCREC_NAME_SPR0 = 3000, PPCREC_NAME_SPR0 = 3000,
PPCREC_NAME_FPR0 = 4000, PPCREC_NAME_FPR_HALF = 4800, // Counts PS0 and PS1 separately. E.g. fp3.ps1 is at offset 3 * 2 + 1
PPCREC_NAME_FPR0_NEW = 4800, // similar to FPR0, but counting PS0 and PS1 separate. So fp3.ps1 is at offset 3 * 2 + 1
PPCREC_NAME_TEMPORARY_FPR0 = 5000, // 0 to 7 PPCREC_NAME_TEMPORARY_FPR0 = 5000, // 0 to 7
PPCREC_NAME_XER_CA = 6000, // carry bit from XER PPCREC_NAME_XER_CA = 6000, // carry bit from XER
PPCREC_NAME_XER_OV = 6001, // overflow bit from XER PPCREC_NAME_XER_OV = 6001, // overflow bit from XER
@ -268,12 +267,12 @@ enum // IMLName
enum enum
{ {
// fpr load // fpr load
PPCREC_FPR_LD_MODE_SINGLE_INTO_PS0, PPCREC_FPR_LD_MODE_SINGLE,
PPCREC_FPR_LD_MODE_DOUBLE_INTO_PS0, PPCREC_FPR_LD_MODE_DOUBLE,
// fpr store // fpr store
PPCREC_FPR_ST_MODE_SINGLE_FROM_PS0, // store 1 single precision float from ps0 PPCREC_FPR_ST_MODE_SINGLE,
PPCREC_FPR_ST_MODE_DOUBLE_FROM_PS0, // store 1 double precision float from ps0 PPCREC_FPR_ST_MODE_DOUBLE,
PPCREC_FPR_ST_MODE_UI32_FROM_PS0, // store raw low-32bit of PS0 PPCREC_FPR_ST_MODE_UI32_FROM_PS0, // store raw low-32bit of PS0
}; };

View file

@ -34,8 +34,8 @@ void PPCRecompiler_optimizeDirectFloatCopiesScanForward(ppcImlGenContext_t* ppcI
if (imlInstruction->IsSuffixInstruction()) if (imlInstruction->IsSuffixInstruction())
break; break;
// check if FPR is stored // check if FPR is stored
if ((imlInstruction->type == PPCREC_IML_TYPE_FPR_STORE && imlInstruction->op_storeLoad.mode == PPCREC_FPR_ST_MODE_SINGLE_FROM_PS0) || if ((imlInstruction->type == PPCREC_IML_TYPE_FPR_STORE && imlInstruction->op_storeLoad.mode == PPCREC_FPR_ST_MODE_SINGLE) ||
(imlInstruction->type == PPCREC_IML_TYPE_FPR_STORE_INDEXED && imlInstruction->op_storeLoad.mode == PPCREC_FPR_ST_MODE_SINGLE_FROM_PS0)) (imlInstruction->type == PPCREC_IML_TYPE_FPR_STORE_INDEXED && imlInstruction->op_storeLoad.mode == PPCREC_FPR_ST_MODE_SINGLE))
{ {
if (imlInstruction->op_storeLoad.registerData.GetRegID() == fprIndex) if (imlInstruction->op_storeLoad.registerData.GetRegID() == fprIndex)
{ {

View file

@ -18,13 +18,13 @@ IMLReg _GetRegCR(ppcImlGenContext_t* ppcImlGenContext, uint8 crReg, uint8 crBit)
IMLReg _GetFPRRegPS0(ppcImlGenContext_t* ppcImlGenContext, uint32 regIndex) IMLReg _GetFPRRegPS0(ppcImlGenContext_t* ppcImlGenContext, uint32 regIndex)
{ {
cemu_assert_debug(regIndex < 32); cemu_assert_debug(regIndex < 32);
return PPCRecompilerImlGen_LookupReg(ppcImlGenContext, PPCREC_NAME_FPR0_NEW + regIndex * 2 + 0, IMLRegFormat::F64); return PPCRecompilerImlGen_LookupReg(ppcImlGenContext, PPCREC_NAME_FPR_HALF + regIndex * 2 + 0, IMLRegFormat::F64);
} }
IMLReg _GetFPRRegPS1(ppcImlGenContext_t* ppcImlGenContext, uint32 regIndex) IMLReg _GetFPRRegPS1(ppcImlGenContext_t* ppcImlGenContext, uint32 regIndex)
{ {
cemu_assert_debug(regIndex < 32); cemu_assert_debug(regIndex < 32);
return PPCRecompilerImlGen_LookupReg(ppcImlGenContext, PPCREC_NAME_FPR0_NEW + regIndex * 2 + 1, IMLRegFormat::F64); return PPCRecompilerImlGen_LookupReg(ppcImlGenContext, PPCREC_NAME_FPR_HALF + regIndex * 2 + 1, IMLRegFormat::F64);
} }
IMLReg _GetFPRTemp(ppcImlGenContext_t* ppcImlGenContext, uint32 index) IMLReg _GetFPRTemp(ppcImlGenContext_t* ppcImlGenContext, uint32 index)
@ -36,7 +36,7 @@ IMLReg _GetFPRTemp(ppcImlGenContext_t* ppcImlGenContext, uint32 index)
IMLReg _GetFPRReg(ppcImlGenContext_t* ppcImlGenContext, uint32 regIndex, bool selectPS1) IMLReg _GetFPRReg(ppcImlGenContext_t* ppcImlGenContext, uint32 regIndex, bool selectPS1)
{ {
cemu_assert_debug(regIndex < 32); cemu_assert_debug(regIndex < 32);
return PPCRecompilerImlGen_LookupReg(ppcImlGenContext, PPCREC_NAME_FPR0_NEW + regIndex * 2 + (selectPS1 ? 1 : 0), IMLRegFormat::F64); return PPCRecompilerImlGen_LookupReg(ppcImlGenContext, PPCREC_NAME_FPR_HALF + regIndex * 2 + (selectPS1 ? 1 : 0), IMLRegFormat::F64);
} }
/* /*
@ -66,12 +66,12 @@ bool PPCRecompilerImlGen_LFS_LFSU_LFD_LFDU(ppcImlGenContext_t* ppcImlGenContext,
if (isDouble) if (isDouble)
{ {
// LFD/LFDU // LFD/LFDU
ppcImlGenContext->emitInst().make_fpr_r_memory(fpPs0, gprRegister, imm, PPCREC_FPR_LD_MODE_DOUBLE_INTO_PS0, true); ppcImlGenContext->emitInst().make_fpr_r_memory(fpPs0, gprRegister, imm, PPCREC_FPR_LD_MODE_DOUBLE, true);
} }
else else
{ {
// LFS/LFSU // LFS/LFSU
ppcImlGenContext->emitInst().make_fpr_r_memory(fpPs0, gprRegister, imm, PPCREC_FPR_LD_MODE_SINGLE_INTO_PS0, true); ppcImlGenContext->emitInst().make_fpr_r_memory(fpPs0, gprRegister, imm, PPCREC_FPR_LD_MODE_SINGLE, true);
if( ppcImlGenContext->LSQE ) if( ppcImlGenContext->LSQE )
{ {
DefinePS1(fpPs1, frD); DefinePS1(fpPs1, frD);
@ -99,16 +99,16 @@ bool PPCRecompilerImlGen_LFSX_LFSUX_LFDX_LFDUX(ppcImlGenContext_t* ppcImlGenCont
if (isDouble) if (isDouble)
{ {
if (withUpdate) if (withUpdate)
ppcImlGenContext->emitInst().make_fpr_r_memory(fpPs0, gprRegister1, 0, PPCREC_FPR_LD_MODE_DOUBLE_INTO_PS0, true); ppcImlGenContext->emitInst().make_fpr_r_memory(fpPs0, gprRegister1, 0, PPCREC_FPR_LD_MODE_DOUBLE, true);
else else
ppcImlGenContext->emitInst().make_fpr_r_memory_indexed(fpPs0, gprRegister1, gprRegister2, PPCREC_FPR_LD_MODE_DOUBLE_INTO_PS0, true); ppcImlGenContext->emitInst().make_fpr_r_memory_indexed(fpPs0, gprRegister1, gprRegister2, PPCREC_FPR_LD_MODE_DOUBLE, true);
} }
else else
{ {
if (withUpdate) if (withUpdate)
ppcImlGenContext->emitInst().make_fpr_r_memory( fpPs0, gprRegister1, 0, PPCREC_FPR_LD_MODE_SINGLE_INTO_PS0, true); ppcImlGenContext->emitInst().make_fpr_r_memory( fpPs0, gprRegister1, 0, PPCREC_FPR_LD_MODE_SINGLE, true);
else else
ppcImlGenContext->emitInst().make_fpr_r_memory_indexed( fpPs0, gprRegister1, gprRegister2, PPCREC_FPR_LD_MODE_SINGLE_INTO_PS0, true); ppcImlGenContext->emitInst().make_fpr_r_memory_indexed( fpPs0, gprRegister1, gprRegister2, PPCREC_FPR_LD_MODE_SINGLE, true);
if( ppcImlGenContext->LSQE ) if( ppcImlGenContext->LSQE )
{ {
DefinePS1(fpPs1, frD); DefinePS1(fpPs1, frD);
@ -131,9 +131,9 @@ bool PPCRecompilerImlGen_STFS_STFSU_STFD_STFDU(ppcImlGenContext_t* ppcImlGenCont
imm = 0; imm = 0;
} }
if (isDouble) if (isDouble)
ppcImlGenContext->emitInst().make_fpr_memory_r(fpPs0, gprRegister, imm, PPCREC_FPR_ST_MODE_DOUBLE_FROM_PS0, true); ppcImlGenContext->emitInst().make_fpr_memory_r(fpPs0, gprRegister, imm, PPCREC_FPR_ST_MODE_DOUBLE, true);
else else
ppcImlGenContext->emitInst().make_fpr_memory_r(fpPs0, gprRegister, imm, PPCREC_FPR_ST_MODE_SINGLE_FROM_PS0, true); ppcImlGenContext->emitInst().make_fpr_memory_r(fpPs0, gprRegister, imm, PPCREC_FPR_ST_MODE_SINGLE, true);
return true; return true;
} }
@ -154,7 +154,7 @@ bool PPCRecompilerImlGen_STFSX_STFSUX_STFDX_STFDUX(ppcImlGenContext_t* ppcImlGen
ppcImlGenContext->emitInst().make_r_r_r(PPCREC_IML_OP_ADD, gprRegister1, gprRegister1, gprRegister2); ppcImlGenContext->emitInst().make_r_r_r(PPCREC_IML_OP_ADD, gprRegister1, gprRegister1, gprRegister2);
} }
DefinePS0(fpPs0, frS); DefinePS0(fpPs0, frS);
auto mode = isDouble ? PPCREC_FPR_ST_MODE_DOUBLE_FROM_PS0 : PPCREC_FPR_ST_MODE_SINGLE_FROM_PS0; auto mode = isDouble ? PPCREC_FPR_ST_MODE_DOUBLE : PPCREC_FPR_ST_MODE_SINGLE;
if( ppcImlGenContext->LSQE ) if( ppcImlGenContext->LSQE )
{ {
if (hasUpdate) if (hasUpdate)
@ -800,10 +800,10 @@ void PPCRecompilerImlGen_EmitPSQLoadCase(ppcImlGenContext_t* ppcImlGenContext, E
{ {
if (loadType == Espresso::PSQ_LOAD_TYPE::TYPE_F32) if (loadType == Espresso::PSQ_LOAD_TYPE::TYPE_F32)
{ {
ppcImlGenContext->emitInst().make_fpr_r_memory(fprDPS0, gprA, imm, PPCREC_FPR_LD_MODE_SINGLE_INTO_PS0, true); ppcImlGenContext->emitInst().make_fpr_r_memory(fprDPS0, gprA, imm, PPCREC_FPR_LD_MODE_SINGLE, true);
if(readPS1) if(readPS1)
{ {
ppcImlGenContext->emitInst().make_fpr_r_memory(fprDPS1, gprA, imm + 4, PPCREC_FPR_LD_MODE_SINGLE_INTO_PS0, true); ppcImlGenContext->emitInst().make_fpr_r_memory(fprDPS1, gprA, imm + 4, PPCREC_FPR_LD_MODE_SINGLE, true);
} }
} }
if (loadType == Espresso::PSQ_LOAD_TYPE::TYPE_U16 || loadType == Espresso::PSQ_LOAD_TYPE::TYPE_S16) if (loadType == Espresso::PSQ_LOAD_TYPE::TYPE_U16 || loadType == Espresso::PSQ_LOAD_TYPE::TYPE_S16)
@ -900,10 +900,10 @@ void PPCRecompilerImlGen_EmitPSQStoreCase(ppcImlGenContext_t* ppcImlGenContext,
cemu_assert_debug(!storePS1 || fprDPS1.IsValid()); cemu_assert_debug(!storePS1 || fprDPS1.IsValid());
if (storeType == Espresso::PSQ_LOAD_TYPE::TYPE_F32) if (storeType == Espresso::PSQ_LOAD_TYPE::TYPE_F32)
{ {
ppcImlGenContext->emitInst().make_fpr_memory_r(fprDPS0, gprA, imm, PPCREC_FPR_ST_MODE_SINGLE_FROM_PS0, true); ppcImlGenContext->emitInst().make_fpr_memory_r(fprDPS0, gprA, imm, PPCREC_FPR_ST_MODE_SINGLE, true);
if(storePS1) if(storePS1)
{ {
ppcImlGenContext->emitInst().make_fpr_memory_r(fprDPS1, gprA, imm + 4, PPCREC_FPR_ST_MODE_SINGLE_FROM_PS0, true); ppcImlGenContext->emitInst().make_fpr_memory_r(fprDPS1, gprA, imm + 4, PPCREC_FPR_ST_MODE_SINGLE, true);
} }
} }
else if (storeType == Espresso::PSQ_LOAD_TYPE::TYPE_U16 || storeType == Espresso::PSQ_LOAD_TYPE::TYPE_S16) else if (storeType == Espresso::PSQ_LOAD_TYPE::TYPE_U16 || storeType == Espresso::PSQ_LOAD_TYPE::TYPE_S16)