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PPCRec: Implement MFCR and MTCRF
This commit is contained in:
Exzap
parent
9dd4f9b9a3
commit
1cc458c543
12 changed files with 60 additions and 921 deletions
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@ -6,492 +6,11 @@
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#include "../PPCRecompilerIml.h"
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#include "../BackendX64/BackendX64.h"
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//bool _RegExceedsFPRSpace(IMLReg r)
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//{
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// if (r.IsInvalid())
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// return false;
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// if (r.GetRegID() >= PPC_X64_FPR_USABLE_REGISTERS)
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// return true;
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// return false;
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//}
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IMLReg _FPRRegFromID(IMLRegID regId)
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{
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return IMLReg(IMLRegFormat::F64, IMLRegFormat::F64, 0, regId);
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}
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//bool PPCRecompiler_reduceNumberOfFPRRegisters(ppcImlGenContext_t* ppcImlGenContext)
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//{
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// // only xmm0 to xmm14 may be used, xmm15 is reserved
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// // this method will reduce the number of fpr registers used
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// // inefficient algorithm for optimizing away excess registers
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// // we simply load, use and store excess registers into other unused registers when we need to
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// // first we remove all name load and store instructions that involve out-of-bounds registers
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// for (IMLSegment* segIt : ppcImlGenContext->segmentList2)
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// {
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// size_t imlIndex = 0;
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// while( imlIndex < segIt->imlList.size() )
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// {
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// IMLInstruction& imlInstructionItr = segIt->imlList[imlIndex];
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// if( imlInstructionItr.type == PPCREC_IML_TYPE_FPR_R_NAME || imlInstructionItr.type == PPCREC_IML_TYPE_FPR_NAME_R )
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// {
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// if(_RegExceedsFPRSpace(imlInstructionItr.op_r_name.regR))
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// {
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// imlInstructionItr.make_no_op();
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// }
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// }
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// imlIndex++;
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// }
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// }
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// // replace registers
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// for (IMLSegment* segIt : ppcImlGenContext->segmentList2)
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// {
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// size_t imlIndex = 0;
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// while( imlIndex < segIt->imlList.size() )
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// {
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// IMLUsedRegisters registersUsed;
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// while( true )
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// {
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// segIt->imlList[imlIndex].CheckRegisterUsage(®istersUsed);
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// if(_RegExceedsFPRSpace(registersUsed.readFPR1) || _RegExceedsFPRSpace(registersUsed.readFPR2) || _RegExceedsFPRSpace(registersUsed.readFPR3) || _RegExceedsFPRSpace(registersUsed.readFPR4) || _RegExceedsFPRSpace(registersUsed.writtenFPR1) )
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// {
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// // get index of register to replace
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// sint32 fprToReplace = -1;
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// if(_RegExceedsFPRSpace(registersUsed.readFPR1) )
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// fprToReplace = registersUsed.readFPR1.GetRegID();
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// else if(_RegExceedsFPRSpace(registersUsed.readFPR2) )
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// fprToReplace = registersUsed.readFPR2.GetRegID();
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// else if (_RegExceedsFPRSpace(registersUsed.readFPR3))
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// fprToReplace = registersUsed.readFPR3.GetRegID();
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// else if (_RegExceedsFPRSpace(registersUsed.readFPR4))
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// fprToReplace = registersUsed.readFPR4.GetRegID();
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// else if(_RegExceedsFPRSpace(registersUsed.writtenFPR1) )
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// fprToReplace = registersUsed.writtenFPR1.GetRegID();
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// if (fprToReplace >= 0)
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// {
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// // generate mask of useable registers
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// uint8 useableRegisterMask = 0x7F; // lowest bit is fpr register 0
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// if (registersUsed.readFPR1.IsValid())
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// useableRegisterMask &= ~(1 << (registersUsed.readFPR1.GetRegID()));
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// if (registersUsed.readFPR2.IsValid())
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// useableRegisterMask &= ~(1 << (registersUsed.readFPR2.GetRegID()));
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// if (registersUsed.readFPR3.IsValid())
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// useableRegisterMask &= ~(1 << (registersUsed.readFPR3.GetRegID()));
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// if (registersUsed.readFPR4.IsValid())
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// useableRegisterMask &= ~(1 << (registersUsed.readFPR4.GetRegID()));
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// if (registersUsed.writtenFPR1.IsValid())
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// useableRegisterMask &= ~(1 << (registersUsed.writtenFPR1.GetRegID()));
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// // get highest unused register index (0-6 range)
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// sint32 unusedRegisterIndex = -1;
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// for (sint32 f = 0; f < PPC_X64_FPR_USABLE_REGISTERS; f++)
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// {
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// if (useableRegisterMask & (1 << f))
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// {
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// unusedRegisterIndex = f;
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// }
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// }
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// if (unusedRegisterIndex == -1)
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// assert_dbg();
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// // determine if the placeholder register is actually used (if not we must not load/store it)
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// uint32 unusedRegisterName = ppcImlGenContext->mappedFPRRegister[unusedRegisterIndex];
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// bool replacedRegisterIsUsed = true;
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// if (unusedRegisterName >= PPCREC_NAME_FPR0 && unusedRegisterName < (PPCREC_NAME_FPR0 + 32))
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// {
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// replacedRegisterIsUsed = segIt->ppcFPRUsed[unusedRegisterName - PPCREC_NAME_FPR0];
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// }
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// // replace registers that are out of range
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// segIt->imlList[imlIndex].ReplaceFPR(fprToReplace, unusedRegisterIndex);
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// // add load/store name after instruction
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// PPCRecompiler_pushBackIMLInstructions(segIt, imlIndex + 1, 2);
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// // add load/store before current instruction
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// PPCRecompiler_pushBackIMLInstructions(segIt, imlIndex, 2);
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// // name_unusedRegister = unusedRegister
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// IMLInstruction* imlInstructionItr = segIt->imlList.data() + (imlIndex + 0);
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// memset(imlInstructionItr, 0x00, sizeof(IMLInstruction));
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// if (replacedRegisterIsUsed)
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// {
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// imlInstructionItr->type = PPCREC_IML_TYPE_FPR_NAME_R;
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// imlInstructionItr->operation = PPCREC_IML_OP_ASSIGN;
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// imlInstructionItr->op_r_name.regR = _FPRRegFromID(unusedRegisterIndex);
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// imlInstructionItr->op_r_name.name = ppcImlGenContext->mappedFPRRegister[unusedRegisterIndex];
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// }
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// else
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// imlInstructionItr->make_no_op();
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// imlInstructionItr = segIt->imlList.data() + (imlIndex + 1);
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// memset(imlInstructionItr, 0x00, sizeof(IMLInstruction));
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// imlInstructionItr->type = PPCREC_IML_TYPE_FPR_R_NAME;
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// imlInstructionItr->operation = PPCREC_IML_OP_ASSIGN;
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// imlInstructionItr->op_r_name.regR = _FPRRegFromID(unusedRegisterIndex);
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// imlInstructionItr->op_r_name.name = ppcImlGenContext->mappedFPRRegister[fprToReplace];
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// // name_gprToReplace = unusedRegister
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// imlInstructionItr = segIt->imlList.data() + (imlIndex + 3);
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// memset(imlInstructionItr, 0x00, sizeof(IMLInstruction));
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// imlInstructionItr->type = PPCREC_IML_TYPE_FPR_NAME_R;
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// imlInstructionItr->operation = PPCREC_IML_OP_ASSIGN;
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// imlInstructionItr->op_r_name.regR = _FPRRegFromID(unusedRegisterIndex);
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// imlInstructionItr->op_r_name.name = ppcImlGenContext->mappedFPRRegister[fprToReplace];
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// // unusedRegister = name_unusedRegister
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// imlInstructionItr = segIt->imlList.data() + (imlIndex + 4);
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// memset(imlInstructionItr, 0x00, sizeof(IMLInstruction));
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// if (replacedRegisterIsUsed)
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// {
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// imlInstructionItr->type = PPCREC_IML_TYPE_FPR_R_NAME;
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// imlInstructionItr->operation = PPCREC_IML_OP_ASSIGN;
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// imlInstructionItr->op_r_name.regR = _FPRRegFromID(unusedRegisterIndex);
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// imlInstructionItr->op_r_name.name = ppcImlGenContext->mappedFPRRegister[unusedRegisterIndex];
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// }
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// else
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// imlInstructionItr->make_no_op();
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// }
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// }
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// else
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// break;
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// }
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// imlIndex++;
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// }
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// }
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// return true;
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//}
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//
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//typedef struct
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//{
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// bool isActive;
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// uint32 virtualReg;
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// sint32 lastUseIndex;
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//}ppcRecRegisterMapping_t;
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//
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//typedef struct
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//{
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// ppcRecRegisterMapping_t currentMapping[PPC_X64_FPR_USABLE_REGISTERS];
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// sint32 ppcRegToMapping[64];
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// sint32 currentUseIndex;
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//}ppcRecManageRegisters_t;
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//
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//ppcRecRegisterMapping_t* PPCRecompiler_findAvailableRegisterDepr(ppcRecManageRegisters_t* rCtx, IMLUsedRegisters* instructionUsedRegisters)
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//{
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// // find free register
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// for (sint32 i = 0; i < PPC_X64_FPR_USABLE_REGISTERS; i++)
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// {
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// if (rCtx->currentMapping[i].isActive == false)
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// {
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// rCtx->currentMapping[i].isActive = true;
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// rCtx->currentMapping[i].virtualReg = -1;
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// rCtx->currentMapping[i].lastUseIndex = rCtx->currentUseIndex;
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// return rCtx->currentMapping + i;
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// }
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// }
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// // all registers are used
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// return nullptr;
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//}
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//
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//ppcRecRegisterMapping_t* PPCRecompiler_findUnloadableRegister(ppcRecManageRegisters_t* rCtx, IMLUsedRegisters* instructionUsedRegisters, uint32 unloadLockedMask)
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//{
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// // find unloadable register (with lowest lastUseIndex)
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// sint32 unloadIndex = -1;
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// sint32 unloadIndexLastUse = 0x7FFFFFFF;
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// for (sint32 i = 0; i < PPC_X64_FPR_USABLE_REGISTERS; i++)
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// {
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// if (rCtx->currentMapping[i].isActive == false)
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// continue;
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// if( (unloadLockedMask&(1<<i)) != 0 )
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// continue;
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// IMLRegID virtualReg = rCtx->currentMapping[i].virtualReg;
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// bool isReserved = instructionUsedRegisters->HasSameBaseFPRRegId(virtualReg);
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// if (isReserved)
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// continue;
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// if (rCtx->currentMapping[i].lastUseIndex < unloadIndexLastUse)
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// {
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// unloadIndexLastUse = rCtx->currentMapping[i].lastUseIndex;
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// unloadIndex = i;
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// }
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// }
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// cemu_assert(unloadIndex != -1);
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// return rCtx->currentMapping + unloadIndex;
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//}
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//
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//bool PPCRecompiler_manageFPRRegistersForSegment(ppcImlGenContext_t* ppcImlGenContext, sint32 segmentIndex)
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//{
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// ppcRecManageRegisters_t rCtx = { 0 };
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// for (sint32 i = 0; i < 64; i++)
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// rCtx.ppcRegToMapping[i] = -1;
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// IMLSegment* imlSegment = ppcImlGenContext->segmentList2[segmentIndex];
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// size_t idx = 0;
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// sint32 currentUseIndex = 0;
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// IMLUsedRegisters registersUsed;
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// while (idx < imlSegment->imlList.size())
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// {
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// IMLInstruction& idxInst = imlSegment->imlList[idx];
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// if (idxInst.IsSuffixInstruction())
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// break;
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// idxInst.CheckRegisterUsage(®istersUsed);
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// IMLReg fprMatch[4];
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// IMLReg fprReplace[4];
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// fprMatch[0] = IMLREG_INVALID;
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// fprMatch[1] = IMLREG_INVALID;
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// fprMatch[2] = IMLREG_INVALID;
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// fprMatch[3] = IMLREG_INVALID;
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// fprReplace[0] = IMLREG_INVALID;
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// fprReplace[1] = IMLREG_INVALID;
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// fprReplace[2] = IMLREG_INVALID;
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// fprReplace[3] = IMLREG_INVALID;
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// // generate a mask of registers that we may not free
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// sint32 numReplacedOperands = 0;
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// uint32 unloadLockedMask = 0;
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// for (sint32 f = 0; f < 5; f++)
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// {
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// IMLReg virtualFpr;
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// if (f == 0)
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// virtualFpr = registersUsed.readFPR1;
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// else if (f == 1)
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// virtualFpr = registersUsed.readFPR2;
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// else if (f == 2)
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// virtualFpr = registersUsed.readFPR3;
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// else if (f == 3)
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// virtualFpr = registersUsed.readFPR4;
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// else if (f == 4)
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// virtualFpr = registersUsed.writtenFPR1;
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// if(virtualFpr.IsInvalid())
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// continue;
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// cemu_assert_debug(virtualFpr.GetBaseFormat() == IMLRegFormat::F64);
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// cemu_assert_debug(virtualFpr.GetRegFormat() == IMLRegFormat::F64);
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// cemu_assert_debug(virtualFpr.GetRegID() < 64);
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// // check if this virtual FPR is already loaded in any real register
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// ppcRecRegisterMapping_t* regMapping;
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// if (rCtx.ppcRegToMapping[virtualFpr.GetRegID()] == -1)
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// {
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// // not loaded
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// // find available register
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// while (true)
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// {
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// regMapping = PPCRecompiler_findAvailableRegisterDepr(&rCtx, ®istersUsed);
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// if (regMapping == NULL)
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// {
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// // unload least recently used register and try again
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// ppcRecRegisterMapping_t* unloadRegMapping = PPCRecompiler_findUnloadableRegister(&rCtx, ®istersUsed, unloadLockedMask);
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// // mark as locked
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// unloadLockedMask |= (1<<(unloadRegMapping- rCtx.currentMapping));
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// // create unload instruction
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// PPCRecompiler_pushBackIMLInstructions(imlSegment, idx, 1);
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// IMLInstruction* imlInstructionTemp = imlSegment->imlList.data() + idx;
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// memset(imlInstructionTemp, 0x00, sizeof(IMLInstruction));
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// imlInstructionTemp->type = PPCREC_IML_TYPE_FPR_NAME_R;
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// imlInstructionTemp->operation = PPCREC_IML_OP_ASSIGN;
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// imlInstructionTemp->op_r_name.regR = _FPRRegFromID((uint8)(unloadRegMapping - rCtx.currentMapping));
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// imlInstructionTemp->op_r_name.name = ppcImlGenContext->mappedFPRRegister[unloadRegMapping->virtualReg];
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// idx++;
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// // update mapping
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// unloadRegMapping->isActive = false;
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// rCtx.ppcRegToMapping[unloadRegMapping->virtualReg] = -1;
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// }
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// else
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// break;
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// }
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// // create load instruction
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// PPCRecompiler_pushBackIMLInstructions(imlSegment, idx, 1);
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// IMLInstruction* imlInstructionTemp = imlSegment->imlList.data() + idx;
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// memset(imlInstructionTemp, 0x00, sizeof(IMLInstruction));
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// imlInstructionTemp->type = PPCREC_IML_TYPE_FPR_R_NAME;
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// imlInstructionTemp->operation = PPCREC_IML_OP_ASSIGN;
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// imlInstructionTemp->op_r_name.regR = _FPRRegFromID((uint8)(regMapping-rCtx.currentMapping));
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// imlInstructionTemp->op_r_name.name = ppcImlGenContext->mappedFPRRegister[virtualFpr.GetRegID()];
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// idx++;
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// // update mapping
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// regMapping->virtualReg = virtualFpr.GetRegID();
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// rCtx.ppcRegToMapping[virtualFpr.GetRegID()] = (sint32)(regMapping - rCtx.currentMapping);
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// regMapping->lastUseIndex = rCtx.currentUseIndex;
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// rCtx.currentUseIndex++;
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// }
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// else
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// {
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// regMapping = rCtx.currentMapping + rCtx.ppcRegToMapping[virtualFpr.GetRegID()];
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// regMapping->lastUseIndex = rCtx.currentUseIndex;
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// rCtx.currentUseIndex++;
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// }
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// // replace FPR
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// bool entryFound = false;
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// for (sint32 t = 0; t < numReplacedOperands; t++)
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// {
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// if (fprMatch[t].IsValid() && fprMatch[t].GetRegID() == virtualFpr.GetRegID())
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// {
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// cemu_assert_debug(fprReplace[t] == _FPRRegFromID(regMapping - rCtx.currentMapping));
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// entryFound = true;
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// break;
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// }
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// }
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// if (entryFound == false)
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// {
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// cemu_assert_debug(numReplacedOperands != 4);
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// fprMatch[numReplacedOperands] = virtualFpr;
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// fprReplace[numReplacedOperands] = _FPRRegFromID(regMapping - rCtx.currentMapping);
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// numReplacedOperands++;
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// }
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// }
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// if (numReplacedOperands > 0)
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// {
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// imlSegment->imlList[idx].ReplaceFPRs(fprMatch, fprReplace);
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// }
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// // next
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// idx++;
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// }
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// // count loaded registers
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// sint32 numLoadedRegisters = 0;
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// for (sint32 i = 0; i < PPC_X64_FPR_USABLE_REGISTERS; i++)
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// {
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// if (rCtx.currentMapping[i].isActive)
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// numLoadedRegisters++;
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// }
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// // store all loaded registers
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// if (numLoadedRegisters > 0)
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// {
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// PPCRecompiler_pushBackIMLInstructions(imlSegment, idx, numLoadedRegisters);
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// for (sint32 i = 0; i < PPC_X64_FPR_USABLE_REGISTERS; i++)
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// {
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// if (rCtx.currentMapping[i].isActive == false)
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// continue;
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// IMLInstruction* imlInstructionTemp = imlSegment->imlList.data() + idx;
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// memset(imlInstructionTemp, 0x00, sizeof(IMLInstruction));
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// imlInstructionTemp->type = PPCREC_IML_TYPE_FPR_NAME_R;
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// imlInstructionTemp->operation = PPCREC_IML_OP_ASSIGN;
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// imlInstructionTemp->op_r_name.regR = _FPRRegFromID(i);
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// imlInstructionTemp->op_r_name.name = ppcImlGenContext->mappedFPRRegister[rCtx.currentMapping[i].virtualReg];
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// idx++;
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// }
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// }
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// return true;
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//}
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//
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//bool PPCRecompiler_manageFPRRegisters(ppcImlGenContext_t* ppcImlGenContext)
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//{
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// for (sint32 s = 0; s < ppcImlGenContext->segmentList2.size(); s++)
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// {
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// if (PPCRecompiler_manageFPRRegistersForSegment(ppcImlGenContext, s) == false)
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// return false;
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// }
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// return true;
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//}
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||||
|
||||
|
||||
/*
|
||||
* Returns true if the loaded value is guaranteed to be overwritten
|
||||
*/
|
||||
bool PPCRecompiler_trackRedundantNameLoadInstruction(ppcImlGenContext_t* ppcImlGenContext, IMLSegment* imlSegment, sint32 startIndex, IMLInstruction* nameStoreInstruction, sint32 scanDepth)
|
||||
{
|
||||
IMLReg registerIndex = nameStoreInstruction->op_r_name.regR;
|
||||
for(size_t i=startIndex; i<imlSegment->imlList.size(); i++)
|
||||
{
|
||||
IMLInstruction* imlInstruction = imlSegment->imlList.data() + i;
|
||||
IMLUsedRegisters registersUsed;
|
||||
imlInstruction->CheckRegisterUsage(®istersUsed);
|
||||
if( registersUsed.readGPR1 == registerIndex || registersUsed.readGPR2 == registerIndex || registersUsed.readGPR3 == registerIndex )
|
||||
return false;
|
||||
if (registersUsed.IsBaseGPRWritten(registerIndex))
|
||||
return true;
|
||||
}
|
||||
// todo: Scan next segment(s)
|
||||
return false;
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns true if the loaded value is guaranteed to be overwritten
|
||||
*/
|
||||
bool PPCRecompiler_trackRedundantFPRNameLoadInstruction(ppcImlGenContext_t* ppcImlGenContext, IMLSegment* imlSegment, sint32 startIndex, IMLInstruction* nameStoreInstruction, sint32 scanDepth)
|
||||
{
|
||||
IMLRegID regId = nameStoreInstruction->op_r_name.regR.GetRegID();
|
||||
for(size_t i=startIndex; i<imlSegment->imlList.size(); i++)
|
||||
{
|
||||
IMLInstruction* imlInstruction = imlSegment->imlList.data() + i;
|
||||
IMLUsedRegisters registersUsed;
|
||||
imlInstruction->CheckRegisterUsage(®istersUsed);
|
||||
if( registersUsed.readFPR1.IsValidAndSameRegID(regId) || registersUsed.readFPR2.IsValidAndSameRegID(regId) || registersUsed.readFPR3.IsValidAndSameRegID(regId) || registersUsed.readFPR4.IsValidAndSameRegID(regId))
|
||||
return false;
|
||||
if( registersUsed.writtenFPR1.IsValidAndSameRegID(regId) )
|
||||
return true;
|
||||
}
|
||||
// todo: Scan next segment(s)
|
||||
return false;
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns true if the loaded name is never changed
|
||||
*/
|
||||
bool PPCRecompiler_trackRedundantNameStoreInstruction(ppcImlGenContext_t* ppcImlGenContext, IMLSegment* imlSegment, sint32 startIndex, IMLInstruction* nameStoreInstruction, sint32 scanDepth)
|
||||
{
|
||||
IMLReg regR = nameStoreInstruction->op_r_name.regR;
|
||||
for(sint32 i=startIndex; i>=0; i--)
|
||||
{
|
||||
IMLInstruction* imlInstruction = imlSegment->imlList.data() + i;
|
||||
IMLUsedRegisters registersUsed;
|
||||
imlInstruction->CheckRegisterUsage(®istersUsed);
|
||||
if( registersUsed.IsBaseGPRWritten(regR) )
|
||||
{
|
||||
if( imlSegment->imlList[i].type == PPCREC_IML_TYPE_R_NAME )
|
||||
return true;
|
||||
return false;
|
||||
}
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
sint32 debugCallCounter1 = 0;
|
||||
|
||||
/*
|
||||
* Returns true if the name is overwritten in the current or any following segments
|
||||
*/
|
||||
bool PPCRecompiler_trackOverwrittenNameStoreInstruction(ppcImlGenContext_t* ppcImlGenContext, IMLSegment* imlSegment, sint32 startIndex, IMLInstruction* nameStoreInstruction, sint32 scanDepth)
|
||||
{
|
||||
uint32 name = nameStoreInstruction->op_r_name.name;
|
||||
for(size_t i=startIndex; i<imlSegment->imlList.size(); i++)
|
||||
{
|
||||
const IMLInstruction& imlInstruction = imlSegment->imlList[i];
|
||||
if(imlInstruction.type == PPCREC_IML_TYPE_R_NAME )
|
||||
{
|
||||
// name is loaded before being written
|
||||
if (imlInstruction.op_r_name.name == name)
|
||||
return false;
|
||||
}
|
||||
else if(imlInstruction.type == PPCREC_IML_TYPE_NAME_R )
|
||||
{
|
||||
// name is written before being loaded
|
||||
if (imlInstruction.op_r_name.name == name)
|
||||
return true;
|
||||
}
|
||||
}
|
||||
if( scanDepth >= 2 )
|
||||
return false;
|
||||
if( imlSegment->nextSegmentIsUncertain )
|
||||
return false;
|
||||
if( imlSegment->nextSegmentBranchTaken && PPCRecompiler_trackOverwrittenNameStoreInstruction(ppcImlGenContext, imlSegment->nextSegmentBranchTaken, 0, nameStoreInstruction, scanDepth+1) == false )
|
||||
return false;
|
||||
if( imlSegment->nextSegmentBranchNotTaken && PPCRecompiler_trackOverwrittenNameStoreInstruction(ppcImlGenContext, imlSegment->nextSegmentBranchNotTaken, 0, nameStoreInstruction, scanDepth+1) == false )
|
||||
return false;
|
||||
if( imlSegment->nextSegmentBranchTaken == nullptr && imlSegment->nextSegmentBranchNotTaken == nullptr)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns true if the loaded FPR name is never changed
|
||||
*/
|
||||
bool PPCRecompiler_trackRedundantFPRNameStoreInstruction(ppcImlGenContext_t* ppcImlGenContext, IMLSegment* imlSegment, sint32 startIndex, IMLInstruction* nameStoreInstruction, sint32 scanDepth)
|
||||
{
|
||||
IMLRegID regId = nameStoreInstruction->op_r_name.regR.GetRegID();
|
||||
for(sint32 i=startIndex; i>=0; i--)
|
||||
{
|
||||
IMLInstruction* imlInstruction = imlSegment->imlList.data() + i;
|
||||
IMLUsedRegisters registersUsed;
|
||||
imlInstruction->CheckRegisterUsage(®istersUsed);
|
||||
if( registersUsed.writtenFPR1.IsValidAndSameRegID(regId))
|
||||
{
|
||||
if(imlInstruction->type == PPCREC_IML_TYPE_FPR_R_NAME )
|
||||
return true;
|
||||
return false;
|
||||
}
|
||||
}
|
||||
// todo: Scan next segment(s)
|
||||
return false;
|
||||
}
|
||||
|
||||
void PPCRecompiler_optimizeDirectFloatCopiesScanForward(ppcImlGenContext_t* ppcImlGenContext, IMLSegment* imlSegment, sint32 imlIndexLoad, IMLReg fprReg)
|
||||
{
|
||||
IMLRegID fprIndex = fprReg.GetRegID();
|
||||
|
|
@ -564,7 +83,7 @@ void PPCRecompiler_optimizeDirectFloatCopiesScanForward(ppcImlGenContext_t* ppcI
|
|||
* Keeps denormals and other special float values intact
|
||||
* Slightly improves performance
|
||||
*/
|
||||
void PPCRecompiler_optimizeDirectFloatCopies(ppcImlGenContext_t* ppcImlGenContext)
|
||||
void IMLOptimizer_OptimizeDirectFloatCopies(ppcImlGenContext_t* ppcImlGenContext)
|
||||
{
|
||||
for (IMLSegment* segIt : ppcImlGenContext->segmentList2)
|
||||
{
|
||||
|
|
@ -648,7 +167,7 @@ void PPCRecompiler_optimizeDirectIntegerCopiesScanForward(ppcImlGenContext_t* pp
|
|||
* Advantages:
|
||||
* Slightly improves performance
|
||||
*/
|
||||
void PPCRecompiler_optimizeDirectIntegerCopies(ppcImlGenContext_t* ppcImlGenContext)
|
||||
void IMLOptimizer_OptimizeDirectIntegerCopies(ppcImlGenContext_t* ppcImlGenContext)
|
||||
{
|
||||
for (IMLSegment* segIt : ppcImlGenContext->segmentList2)
|
||||
{
|
||||
|
|
@ -809,133 +328,3 @@ void PPCRecompiler_optimizePSQLoadAndStore(ppcImlGenContext_t* ppcImlGenContext)
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
///*
|
||||
// * Returns true if registerWrite overwrites any of the registers read by registerRead
|
||||
// */
|
||||
//bool PPCRecompilerAnalyzer_checkForGPROverwrite(IMLUsedRegisters* registerRead, IMLUsedRegisters* registerWrite)
|
||||
//{
|
||||
// if (registerWrite->writtenNamedReg1 < 0)
|
||||
// return false;
|
||||
//
|
||||
// if (registerWrite->writtenNamedReg1 == registerRead->readNamedReg1)
|
||||
// return true;
|
||||
// if (registerWrite->writtenNamedReg1 == registerRead->readNamedReg2)
|
||||
// return true;
|
||||
// if (registerWrite->writtenNamedReg1 == registerRead->readNamedReg3)
|
||||
// return true;
|
||||
// return false;
|
||||
//}
|
||||
|
||||
void _reorderConditionModifyInstructions(IMLSegment* imlSegment)
|
||||
{
|
||||
// IMLInstruction* lastInstruction = imlSegment->GetLastInstruction();
|
||||
// // last instruction is a conditional branch?
|
||||
// if (lastInstruction == nullptr || lastInstruction->type != PPCREC_IML_TYPE_CJUMP)
|
||||
// return;
|
||||
// if (lastInstruction->op_conditionalJump.crRegisterIndex >= 8)
|
||||
// return;
|
||||
// // get CR bitmask of bit required for conditional jump
|
||||
// PPCRecCRTracking_t crTracking;
|
||||
// IMLAnalyzer_GetCRTracking(lastInstruction, &crTracking);
|
||||
// uint32 requiredCRBits = crTracking.readCRBits;
|
||||
//
|
||||
// // scan backwards until we find the instruction that sets the CR
|
||||
// sint32 crSetterInstructionIndex = -1;
|
||||
// sint32 unsafeInstructionIndex = -1;
|
||||
// for (sint32 i = imlSegment->imlList.size() - 2; i >= 0; i--)
|
||||
// {
|
||||
// IMLInstruction* imlInstruction = imlSegment->imlList.data() + i;
|
||||
// IMLAnalyzer_GetCRTracking(imlInstruction, &crTracking);
|
||||
// if (crTracking.readCRBits != 0)
|
||||
// return; // dont handle complex cases for now
|
||||
// if (crTracking.writtenCRBits != 0)
|
||||
// {
|
||||
// if ((crTracking.writtenCRBits&requiredCRBits) != 0)
|
||||
// {
|
||||
// crSetterInstructionIndex = i;
|
||||
// break;
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// return; // other CR bits overwritten (dont handle complex cases)
|
||||
// }
|
||||
// }
|
||||
// // is safe? (no risk of overwriting x64 eflags)
|
||||
// if ((imlInstruction->type == PPCREC_IML_TYPE_NAME_R || imlInstruction->type == PPCREC_IML_TYPE_R_NAME || imlInstruction->type == PPCREC_IML_TYPE_NO_OP) ||
|
||||
// (imlInstruction->type == PPCREC_IML_TYPE_FPR_NAME_R || imlInstruction->type == PPCREC_IML_TYPE_FPR_R_NAME) ||
|
||||
// (imlInstruction->type == PPCREC_IML_TYPE_R_S32 && (imlInstruction->operation == PPCREC_IML_OP_ASSIGN)) ||
|
||||
// (imlInstruction->type == PPCREC_IML_TYPE_R_R && (imlInstruction->operation == PPCREC_IML_OP_ASSIGN)) )
|
||||
// continue;
|
||||
// // not safe
|
||||
// if (unsafeInstructionIndex == -1)
|
||||
// unsafeInstructionIndex = i;
|
||||
// }
|
||||
// if (crSetterInstructionIndex < 0)
|
||||
// return;
|
||||
// if (unsafeInstructionIndex < 0)
|
||||
// return; // no danger of overwriting eflags, don't reorder
|
||||
// // check if we can move the CR setter instruction to after unsafeInstructionIndex
|
||||
// PPCRecCRTracking_t crTrackingSetter = crTracking;
|
||||
// IMLUsedRegisters regTrackingCRSetter;
|
||||
// imlSegment->imlList[crSetterInstructionIndex].CheckRegisterUsage(®TrackingCRSetter);
|
||||
// if (regTrackingCRSetter.writtenFPR1 >= 0 || regTrackingCRSetter.readFPR1 >= 0 || regTrackingCRSetter.readFPR2 >= 0 || regTrackingCRSetter.readFPR3 >= 0 || regTrackingCRSetter.readFPR4 >= 0)
|
||||
// return; // we don't handle FPR dependency yet so just ignore FPR instructions
|
||||
// IMLUsedRegisters registerTracking;
|
||||
// if (regTrackingCRSetter.writtenNamedReg1 >= 0)
|
||||
// {
|
||||
// // CR setter does write GPR
|
||||
// for (sint32 i = crSetterInstructionIndex + 1; i <= unsafeInstructionIndex; i++)
|
||||
// {
|
||||
// imlSegment->imlList[i].CheckRegisterUsage(®isterTracking);
|
||||
// // reads register written by CR setter?
|
||||
// if (PPCRecompilerAnalyzer_checkForGPROverwrite(®isterTracking, ®TrackingCRSetter))
|
||||
// {
|
||||
// return; // cant move CR setter because of dependency
|
||||
// }
|
||||
// // writes register read by CR setter?
|
||||
// if (PPCRecompilerAnalyzer_checkForGPROverwrite(®TrackingCRSetter, ®isterTracking))
|
||||
// {
|
||||
// return; // cant move CR setter because of dependency
|
||||
// }
|
||||
// // overwrites register written by CR setter?
|
||||
// if (regTrackingCRSetter.writtenNamedReg1 == registerTracking.writtenNamedReg1)
|
||||
// return;
|
||||
// }
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// // CR setter does not write GPR
|
||||
// for (sint32 i = crSetterInstructionIndex + 1; i <= unsafeInstructionIndex; i++)
|
||||
// {
|
||||
// imlSegment->imlList[i].CheckRegisterUsage(®isterTracking);
|
||||
// // writes register read by CR setter?
|
||||
// if (PPCRecompilerAnalyzer_checkForGPROverwrite(®TrackingCRSetter, ®isterTracking))
|
||||
// {
|
||||
// return; // cant move CR setter because of dependency
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
//
|
||||
// // move CR setter instruction
|
||||
//#ifdef CEMU_DEBUG_ASSERT
|
||||
// if ((unsafeInstructionIndex + 1) <= crSetterInstructionIndex)
|
||||
// assert_dbg();
|
||||
//#endif
|
||||
// IMLInstruction* newCRSetterInstruction = PPCRecompiler_insertInstruction(imlSegment, unsafeInstructionIndex+1);
|
||||
// memcpy(newCRSetterInstruction, imlSegment->imlList.data() + crSetterInstructionIndex, sizeof(IMLInstruction));
|
||||
// imlSegment->imlList[crSetterInstructionIndex].make_no_op();
|
||||
}
|
||||
|
||||
/*
|
||||
* Move instructions which update the condition flags closer to the instruction that consumes them
|
||||
* On x64 this improves performance since we often can avoid storing CR in memory
|
||||
*/
|
||||
void PPCRecompiler_reorderConditionModifyInstructions(ppcImlGenContext_t* ppcImlGenContext)
|
||||
{
|
||||
// check if this segment has a conditional branch
|
||||
for (IMLSegment* segIt : ppcImlGenContext->segmentList2)
|
||||
{
|
||||
_reorderConditionModifyInstructions(segIt);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue